DETAILED ACTION
Claims 1-4 are pending in the present application.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 03/03/2026 have been fully considered but they are not persuasive.
Applicant argues Song et al. (US 20220358994 A1) fails to anticipate, as currently amended, the distinctive feature of “the first resistance of the first on-die terminator and the second resistance of the second on-die terminator are equal” pursuant with M.P.E.P. §2131 (“A claim is anticipated only if each and every element as set forth in the claim is found, either expressly or inherently described, in a single prior art reference.” Verdegaal Bros. v. Union Oil Co. of California, 814 F.2d 628, 631, 2 U.S.P.Q.2d 1051, 1053 (Fed. Cir. 1987)).
Song et al. (hereinafter, Song), discloses a termination circuit 118 including a first termination resistor 318 coupled between a second signal line 312 and a ground reference 320, and a second termination resistor 608 coupled between the first signal line 308 and the ground reference 320 (FIG. 6); and “the first termination resistor 318 and/or the second termination resistor 608 can be implemented as ODTs for differential signaling and/or used to reduce reflections (e.g., return currents) in each signal line.” (para. [0060]).
Song teaches the mode register 116 can be set with 3 bits to control the first termination resistor 318 and an additional 3 bits to control the second termination resistor 608; wherein A 3-bit combination of [000] can, for instance, disable the first termination resistor 318 or second termination resistor 608 while other combinations can set a variable resistance (RZQ/1-6) strength at a predetermined value within a range of 0-300 ohms (Ω) (paras. [0043] and [0061], and Table 1).
Table 1 of Song illustrates bit positions of OP[0:2] of the mode register determines a variable resistance (RZQ) setting for the first termination resistor 318 and bit positions OP[3:5] of the mode register determines a variable resistance value setting for the second termination resistor 608 (para. [0061]). Song does not explicitly express the first and second termination resistors may or may not have the same resistance values assigned to them, and there is no teaching or suggestion that would indicate otherwise. That is, it appears, based on the mode register value, the first and second termination resistors may be variable resistors with the same variable resistance (RZQ) assigned to them.
Therefore, Song expresses at least six different conditions (RZQ/1-6 of Table 1) in which a first resistance of a first on-die terminator and a second resistance of a second on-die terminator may be equal based on a mode register value. The 35 USC § 102 rejection is maintained below.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites overlapping conditional responses to “in response to the first data strobe signal and the second data strobe signal satisfying the first condition . . .” That is, lines 9-17 recite the first resistor and a second resistor are selectively coupled or decoupled from the first and second input terminals of the differential amplifier, respectively, based on the mode register setting in response to the first data strobe signal and the second data strobe signal satisfying the first condition; but lines 18-20 recite the first resistor and the second resistor are decoupled altogether from the first and second input terminals of the differential amplifier, respectively, in response to the first data strobe signal and the second data strobe signal satisfying the first condition. Neither response has a further limiting conditional requirement that would indicate which response has priority—therefore, it is unclear which limitation(s) takes effect when the first data strobe signal and the second data strobe signal satisfying the first condition.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Song et al. (US 20220358994 A1; hereinafter "Song").
Regarding claim 1, Song discloses a method for adaptive noise suppression on data strobe signals (para. [0018]: “the termination circuit may reduce noise and improve the efficiency of the memory device while addressing needs for increased memory performance (e.g., in differential mode) and power-saving techniques (e.g., in SE mode)”), for use in a memory device, wherein the memory device comprises a receiver circuit having a differential amplifier (FIG. 6: differential amplifier 202), a first on-die terminator (FIG. 6: first termination resistor 318), a second on-die terminator (FIG. 6: second termination resistor 608), the method comprising: determining whether a first data strobe signal and a second data strobe signal from a memory controller satisfy a first condition (para. [0015]: “The differential mode of signaling enables each complementary clock signal to be driven at a lower voltage than the SE mode clock signal. In contrast to SE mode signaling, the lower voltage and differential receiver conditioning of the differential mode may enable higher data transfer rates, albeit with an increase in power consumption required to drive more than one clock signal.”); in response to the first data strobe signal and the second data strobe signal satisfying the first condition, determining whether a mode register setting value associated with the first on-die terminator and the second on-die terminator is greater than N, wherein N is a positive integer (para. [0043]: “the mode register 116 can be set with 3 bits to control the first termination resistor 318.”; para. [0061]: “The mode register 116 can also be configured with one or more bits to control the second termination resistor 608 and/or switch 610.”); in response to the mode register setting value being not greater than N, decoupling a first resistor and a second resistor from a first input terminal and a second input terminal of the differential amplifier, respectively (Table 1: OP[0:2] set to 000: ODT disabled, and OP[3:5] set to 000: ODT disable”); in response to the mode register setting value being greater than N, coupling the first resistor and the second resistor to the first input terminal and the second input terminal of the differential amplifier, respectively (para. [0043]: “A 3-bit combination of [000] can, for instance, disable the first termination resistor 318 and/or second switch 322 while other combinations can set a resistance strength at a predetermined value within a range of, for instance, 0-300 ohms (Ω).”; para. [0061]: “a 3-bit combination of [000] can disable the second termination resistor 608, while other combinations can set a resistance strength at a predetermined value within a range of, for instance, 0-300 ohms (Ω).”); and in response to the first data strobe signal and the second data strobe signal satisfying the first condition, decoupling the first resistor and the second resistor from the first input terminal and the second input terminal of the differential amplifier, respectively (para. [0062]: “Either the internal/native control logic 314 or the external logic (e.g., memory controller 108) may use the control signals to open the switches 322 and 610 of the first and second termination features (optional control line configurations shown).”); wherein a first resistance of the first on-die terminator and a second resistance of the second on-die terminator are determined based on the mode register setting value corresponding to the first on-die terminator and the second on-die terminator (para. [0024]: “he variable resistance (RZQ) is shown in Table 1 as having 6 possible preset strengths, though in general, each RZQ can have more or fewer possible strengths.”; para. [0043]: “the mode register 116 can also transmit one or more bits to control one or more resistors (not shown) as described with respect to FIG. 1 (e.g., in accordance with Table 1)”); wherein the first resistance of the first on-die terminator and the second resistance of the second on-die terminator are equal (para. [0061] and Table 1: “a 3-bit array for the first termination resistor 318 can include bit positions of [0:2], while a 3-bit array for the second termination resistor 608 can include bit positions of [3:5]” that is the first termination resistor may be assigned a variable resistance RZQ/1-6 and the second termination resistor may be assigned the same variable resistance RZQ/1-6 value.).
Allowable Subject Matter
Claims 2-4 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUSTIN BRYCE HEISTERKAMP whose telephone number is (703)756-1095. The examiner can normally be reached M-F 0800-1700.
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/JUSTIN BRYCE HEISTERKAMP/Examiner, Art Unit 2827 /AMIR ZARABIAN/ Supervisory Patent Examiner, Art Unit 2827
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