DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-10are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Seo et al. (Seo, US 6,044,534).
Regarding claim 1, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4) comprising: a substrate support (stage 12), wherein the substrate support comprises: a platform defining an annular seat operable to support a semiconductor substrate (wafer 100) about a periphery of the semiconductor substrate (wafer 100), wherein the platform defines an internal recess extending within the annular seat (see FIG. 4); and one or more electrodes (electrode 22) operable to seat a wafer or generate plasma (col. 3, line 25+) within the internal recess.
Regarding claim 2, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein the platform comprises a recessed base defining the internal recess, and wherein the one or more electrodes comprise: an electrode extending about the recessed base as a coil operable as an inductively-coupled plasma coil (See FIG. 4).
Regarding claim 3, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein the recessed base comprises a dielectric material (stage 12).
Regarding claim 4, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein the platform comprises an electrode in the annular seat (stage 12), the electrode operable as an electrostatic chuck for the semiconductor substrate (wafer 100).
Regarding claim 5, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein the platform comprises a recessed base defining the internal recess, wherein the recessed base is grounded relative to the annular seat, and wherein a capacitively coupled plasma is formable within the internal recess (see FIG. 4).
Regarding claim 6, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein the semiconductor processing chamber comprises a portion of a toroidal plasma loop extending into the internal recess, and operable to deliver plasma effluents into the internal recess (see FIG. 4).
Regarding claim 7, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein a portion of the toroidal plasma loop extends outside of the semiconductor processing chamber (see FIG. 4).
Regarding claim 8, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein the portion of the toroidal plasma loop extending outside of the semiconductor processing chamber defines an access for precursor delivery (see FIG. 4).
Regarding claim 9, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein the substrate support defines one or more accesses for precursor delivery into the internal recess (see FIG. 4).
Regarding claim 10, Seo shows a semiconductor processing chamber (processing chamber 13 in FIG. 4), wherein the substrate support defines one or more accesses for exhaust from the internal recess (see FIG. 4).
Allowable Subject Matter
Claims 11-20 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELIAS M ULLAH whose telephone number is (571)272-1415. The examiner can normally be reached M-F at 8AM-5PM EST.
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/ELIAS ULLAH/Primary Examiner, Art Unit 2893
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