DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 2 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
As to claim 2, Applicant has not shown support for wherein the contact exhibits a Schottky Barrier Height that is at least about 5% less than a Schottky Barrier Height in a semiconductor device that does not contain a non-magnetic transition-metal in the silicide contact. For all semiconductor materials and all metal silicides.
Applicant has provided no data while the office believes applicant has support for Silicon applicant has not shown that the outcome would be consistent with III-V materials such as GaN GaAs. Further Diamond has a large Schottky barrier at about 1.2 eV to 2.2Ev much less organic semiconductors.
Thus, applicant does not have support for the entire range of semiconductor materials with silicides per claim 1 with a decrease in 5% in the Schottky barrier.
While there is a presumption that an adequate written description of the claimed invention is present in the specification as filed. In re Wertheim, 541 F.2d 257, 262, 191 USPQ 90, 96 (CCPA 1976), a question as to whether a specification provides an adequate written description may arise in the context of an original claim. An original claim may lack written description support when (1) the claim defines the invention in functional language specifying a desired result but the disclosure fails to sufficiently identify how the function is performed or the result is achieved or (2) a broad genus claim is presented but the disclosure only describes a narrow species with no evidence that the genus is contemplated. See Ariad Pharms., Inc. v. Eli Lilly & Co., 598 F.3d 1336, 1349-50 (Fed. Cir. 2010) (en banc). The written description requirement is not necessarily met when the claim language appears in ipsis verbis in the specification. “Even if a claim is supported by the specification, the language of the specification, to the extent possible, must describe the claimed invention so that one skilled in the art can recognize what is claimed. The appearance of mere indistinct words in a specification or a claim, even an original claim, does not necessarily satisfy that requirement.”Enzo Biochem, Inc. v. Gen-Probe, Inc., 323 F.3d 956, 968, 63 USPQ2d 1609, 1616 (Fed. Cir. 2002). See MPEP 2163.03 V
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 -6,8,10-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tapily 11443949 cited on ids in view of Chu11990376.
a. As to claim 1, 11, and 14, Tapily teaches A method of forming a silicon device, comprising: depositing a first metal layer over a silicon containing substrate in at least a first feature (item 208 on 216: The first raised contact 216 includes a first semiconductor material that can include SiGe or Ge and the second raised contact 214 includes a second semiconductor material that can include doped silicon Si. Silicon germanium can be expressed as SiGe or Si.sub.xGe.sub.1-x, where x is the atomic fraction of Si, 1-x is the atomic fraction of Ge, and 0<x<1. Exemplary Si.sub.xGe.sub.1-x compounds include Si.sub.0.1Ge.sub.0.9, Si.sub.0.2Ge.sub.0.8, Si.sub.0.3Ge.sub.0.7, Si.sub.0.4Ge.sub.0.6, Si.sub.0.5Ge.sub.0.5, Si.sub.0.6Ge.sub.0.4, Si.sub.0.7Ge.sub.0.3, Si.sub.0.8Ge.sub.0.2, and Si.sub.0.9Ge.sub.0.1. The first semiconductor material (SiGe or Ge) may be doped with boron (B), gallium (Ga), or aluminum (Al). The second semiconductor material can include doped Si, where the dopant can include phosphorus (P), antimony (Sb), arsenic (As), or bismuth (Bi).) ; depositing a second metal layer comprising a first metal over the first metal; and annealing the semiconductor device, forming a silicide contact positioned between the first metal layer and the silicon containing substrate, the silicide contact comprising the first metal and the second metal (FIG. 1D shows the substrate 1 following a substrate annealing process that reacts the first metal-containing layer 108 (e.g., Ru metal) with the first semiconductor material 102 to form a first metal silicide layer 110 (e.g., RuSi.sub.x). Exemplary annealing temperatures can be between about 100° C. and about 500° C. Although not shown in FIG. 1D, only a portion of the first metal-containing layer 108 may react to form the first metal silicide layer 110, thereby leaving an unreacted portion of the first metal-containing layer 108 on the first metal silicide layer 110. Any unreacted portion of the first metal-containing layer 108 may optionally be removed from the first metal silicide layer 110 in a dry or wet etching process. In one example, the substrate 1 may be annealed at a first annealing temperature to react a portion of the first metal-containing layer 108 with the first semiconductor material 102 to form a desired crystallographic silicide phase, thereafter removing any unreacted portion of the first metal-containing layer 108 in a cleaning process and, thereafter, annealing the substrate 1 at a second annealing temperature to achieve a lower electrical resistivity for the first metal silicide layer 110. The second annealing temperature can be higher, lower, or the same as the first annealing temperature.).
Tapily does not teach the first metal is a non-magnetic transition metal.
Chu teaches providing a metal for silicides including: Referring to FIGS. 2, 7A and 7B, method 200 includes block 212 where a second metal layer 340 is deposited over the first metal layer 330 and the P-type epitaxial capping layer 320a. In some embodiments, the second metal in the second metal layer 340 is a low work function metal and may be titanium (Ti), erbium (Er), yttrium (Y), ytterbium (Yb), europium (Eu), terbium (Tb), lutetium (Lu), thorium (Th), scandium (Sc), hafnium (Hf) zirconium (Zr), tantalum (Ta), or a combination thereof.
Thus, it would have been obvious to one of ordinary skill in the art at the time of filing to provide the first metal of the stack as a non-magnetic transition metal to optimize the work function as suggest by Chu.
(38) Referring to FIGS. 2, 6A and 6B, method 200 includes block 208 where a first metal layer 330 is selectively deposited over the N-type epitaxial capping layer 320b. In some embodiments, the first metal in the first metal layer 330 is a high work function metal and may be nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), ruthenium (Ru), or a combination thereof. Here, the high work function metal refers to a metal with a work function equal to or above about 4.5 eV. In some implementations, the first metal layer 330 may be deposited using CVD or ALD using a metal complex as a precursor. In some instances, the CVD or ALD for the operations at block 208 may be at a pressure between about 0.2 Torr and about 5 Torr. It has been observed that a high work function metal using a metal complex as a precursor can be preferentially deposited on a N-type epitaxial layer (such as the N-type epitaxial capping layer 320b), rather than a P-type epitaxial layer (such as the P-type epitaxial capping layer 320a). This preferential deposition is brought about at least partially by the strained nature of P-type epitaxial layer. For example, the P-type epitaxial capping layer 320a may be formed of SiGe with a Ge-to-Si ratio larger than 3:2. Because Si and Ge have different lattice constants, the heteroepitaxial SiGe lattice is strained. This built-in strain may be averse to adhesion of metal complexes and therefore to deposition of high work function metal using metal complexes as precursors. A metal complex according to the present disclosure may have general chemical formulae M (tAlkyl.sub.2DAD).sub.2 (bis (1,4-di-t-alkyl.sub.2-1,3-diazabutadienyl) M), M(tBuNNCHCtBuO).sub.2, M(eBuNNCHCiPrO).sub.2, and M(tBuNNCMeCMeO).sub.2, where M(tBuNNCHCtBuO).sub.2, M(eBuNNCHCiPrO).sub.2, and M(tBuNNCMeCMeO).sub.2 are hydrazone salts and M may be nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), ruthenium (Ru). Examples of metal complexes that can be used to selectively deposit the first metal layer 330 at block 208 are provided in FIG. 12. Metal complexes (a) and (b) are in the family of bis (1,4-di-t-alkyl.sub.2-1,3-diazabutadienyl) M, where the alkyl group is pentyl in (a) and the alkyl group is butyl in (b). As described above, because the metal complex has a higher affinity to the N-type epitaxial capping layer 320b than to the P-type epitaxial capping layer 320a, substantially no or little first metal layer 330 may be formed on the P-type epitaxial capping layer 320a.
(39) It is noted that, even without annealing, as the first metal layer 330 is deposited on the N-type epitaxial capping layer 320b by CVD or ALD using the metal complexes described above, the first metal may react with silicon in the N-type epitaxial capping layer 320b, such that at least a part of the N-type epitaxial capping layer 320b is substantially consumed (shown in dotted lines). For example, when the metal complex includes Ni or Co, nickel silicide or cobalt silicide may be formed when Ni (tAlkyl.sub.2DAD).sub.2, Ni(tBuNNCHCtBuO).sub.2, Ni(eBuNNCHCiPrO).sub.2, Ni(tBuNNCMeCMeO).sub.2, Co (tAlkyl.sub.2DAD).sub.2, Co(tBuNNCHCtBuO).sub.2, Co(eBuNNCHCiPrO).sub.2, or Co(tBuNNCMeCMeO).sub.2 is used as a precursor to form the first metal layer 330. Insofar as the first metal layer 330 becomes silicide as the first metal is deposited on the N-type epitaxial capping layer 320b, the first metal layer 330 and the N-type epitaxial capping layer 320b may be collectively referred to as the first metal silicide layer 330b. In some instances, due to lack of high temperature annealing, the first metal silicide layer 330b is amorphous and has a high resistance.
(40) In some embodiments, while no or little of first metal layer 330 is deposited over the P-type epitaxial capping layer 320a, the first metal layer 330 may be formed over the surfaces of the ILD 319 and/or surfaces of the oxygen-atom-free liner. In some embodiments represented in FIGS. 6A and 6B, the first metal layer 330 on the ILD 319 (or the liner on the ILD 319) is not removed by selectively etching. In some alternative embodiments, the first metal layer 330 on the ILD 319 (or the liner on the ILD 319) is removed by selectively etching, such as a suitable wet etching process. In the selective etching, the first metal layer 330 is etched and the first metal silicide layer 330b is substantially unetched.
(41) Method 200 optionally includes block 210 where a first metal cap is deposited the first metal silicide layer 330b and the P-type epitaxial capping layer 320a to protect the first metal silicide layer 330b. The first metal cap may be formed of metal nitride, such as titanium nitride (TiN). In some embodiments, the operations in block 210 may be omitted because material such as metal nitride has lower conductivity than metal silicide. When the first metal cap is formed at block 210, it is also formed over sidewalls of the via trenches 321a and 321b and may function as a barrier layer.
(42) Referring to FIGS. 2, 7A and 7B, method 200 includes block 212 where a second metal layer 340 is deposited over the first metal layer 330 and the P-type epitaxial capping layer 320a. In some embodiments, the second metal in the second metal layer 340 is a low work function metal and may be titanium (Ti), erbium (Er), yttrium (Y), ytterbium (Yb), europium (Eu), terbium (Tb), lutetium (Lu), thorium (Th), scandium (Sc), hafnium (Hf) zirconium (Zr), tantalum (Ta), or a combination thereof. In some instances, the second metal layer 340 may consist essentially of titanium (Ti). Here, the low work function metal refers to a metal with a work function below about 4.5 eV. In some implementations, the second metal layer 340 may be deposited using CVD or ALD. For example, when the second metal layer 340 is formed of titanium, the second metal layer 340 may be formed using tetrakis(dimethylamino) titanium (TDMAT), tetrakis (diethylamino) titanium (TDEAT), or tetrakis(ethylmethylamino) titanium (TEMAT), or a combination thereof as a precursor. Because the deposition of the second metal layer 340 is not selective, the second metal layer 340 is deposited over the first metal layer 330 and the P-type epitaxial capping layer 320a. In some embodiments, even without annealing, as the second metal layer 340 is deposited on the P-type epitaxial capping layer 320a by CVD or ALD, the second metal may react with Si and Ge in the P-type epitaxial capping layer 320a, such that at least a part of the P-type epitaxial capping layer 320a is substantially consumed (shown in dotted lines). For example, when the second metal is titanium (Ti), titanium silicide and/or titanium germanide may be formed when the second metal layer 340 is being deposited on the P-type epitaxial capping layer 320a. Insofar as the second metal layer 340 becomes silicide/germanide as the second metal is deposited on the P-type epitaxial capping layer 320a, the second metal layer 340 and the P-type epitaxial capping layer 320a may be collectively referred to as the second metal silicide/germanide layer 340a. In some instances, due to lack of high temperature annealing, the second metal silicide/germanide layer 340a is amorphous and has a high resistance.
(43) In some embodiments, the second metal layer 340 may be formed over the surfaces of the ILD 319 and/or surfaces of the oxygen-atom-free liner (when the first metal layer 330 on the ILD 319 and/or surfaces of the oxygen-atom-free liner is removed by selective etching) or the first metal layer 330 ((when the first metal layer 330 on the ILD 319 and/or surfaces of the oxygen-atom-free liner is not removed by selective etching). In some embodiments represented in FIGS. 7A and 7B, the second metal layer 340 on the first metal layer 330 ( ) is not removed by selectively etching. In some alternative embodiments, the second metal layer 340 on the first metal layer 330 (or the ILD 319 and/or surfaces of the oxygen-atom-free liner when the first metal layer 330 on the ILD 319 and/or surfaces of the oxygen-atom-free liner is removed by selective etching) is removed by selectively etching, such as a suitable wet etching process. In the selective etching, the second metal layer 340 is etched while the second metal silicide/germanide layer 340a is substantially unetched.
b. As to claims 2, 3, 4, 8 ,18, 19 and 20 Tapily and Chu do not teach:
wherein the contact exhibits a Schottky Barrier Height that is at least about 5% less than a Schottky Barrier Height in a semiconductor device that does not contain a non-magnetic transition-metal in the silicide contact.
Or
wherein the contact exhibits a Schottky Barrier Height of less than 1.0 eV.
Or
wherein the silicide contact comprises a concentration of the non-magnetic transition-metal of greater than or about 1 E+14 per cm2
however, this would be dependent of the concentration of the non-magnetic transition metal and the desire overall work function of the metal alloy after silicide
Thus, it would have been obvious to one of ordinary skill in the art at the time of filing to have optimized the concentration of the non-magnetic transition metal to provide:
wherein the contact exhibits a Schottky Barrier Height that is at least about 5% less than a Schottky Barrier Height in a semiconductor device that does not contain a non-magnetic transition-metal in the silicide contact.
Or
wherein the contact exhibits a Schottky Barrier Height of less than 1.0 eV.
Or
wherein the silicide contact comprises a concentration of the non-magnetic transition-metal of greater than or about 1 E+14 per cm2
to optimize the overall work-function and the Schottky band gap for the desired contact properties.
c. As to claims 5, 13, Chu teaches wherein the non-magnetic transition-metal comprises yttrium, scandium, zirconium, or a combination thereof (may be titanium (Ti), erbium (Er), yttrium (Y), ytterbium (Yb), europium (Eu), terbium (Tb), lutetium (Lu), thorium (Th), scandium (Sc), hafnium (Hf) zirconium (Zr), tantalum (Ta), or a combination thereof.).
d. As to claims 6 and 12, Chu suggests nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), ruthenium (Ru), or a combination thereof.
e. As to claim 10, Tapily suggest a p-fet (FIGS. 2A-2H schematically show through cross-sectional views a method of selectively forming metal silicides in a semiconductor device according to an embodiment of the invention. Referring now to FIG. 2A, a partially manufactured semiconductor device contains a substrate 2 with a first raised contact 216 in a positive-channel field effect transistor (PFET) region and a second raised contact 214 in a negative-channel field effect transistor (NFET) region in a first dielectric film 200, a second dielectric film 202 above the first dielectric film 200, and a shallow trench isolation (STI) layer 220.)
f. As to claim 15, Tapily teaches wherein depositing the non-magnetic transition-metal layer includes exposing the silicon containing substrate in the at least the first feature to a non-magnetic transition-metal precursor (abstract).
g. As to claim 16, Tapily teaches wherein depositing the first metal layer includes exposing the non-magnetic transition-metal layer to a first metal precursor. (FIG. 1F shows a second metal-containing layer 112 that is non-selectively deposited on the substrate 1, including on the first metal silicide layer 110 and on the second semiconductor material 104. The second metal -containing layer 112 may be deposited by vapor phase deposition, for example by CVD, PECVD, ALD, PEALD, or sputtering. In some examples, the second metal -containing layer 112 can include Ti metal, Ni metal, NiPt alloy, Co metal, molybdenum (Mo) metal, tungsten (W) metal, vanadium (V) metal, or a combination thereof. In some examples, the second metal -containing layer 112 may be selectively deposited on the second semiconductor material 104 and not on the first metal silicide layer 110.)
h. As to claim 17, Chu teaches wherein the non-magnetic transition-metal comprises yttrium, scandium, zirconium, or a combination thereof (may be titanium (Ti), erbium (Er), yttrium (Y), ytterbium (Yb), europium (Eu), terbium (Tb), lutetium (Lu), thorium (Th), scandium (Sc), hafnium (Hf) zirconium (Zr), tantalum (Ta), or a combination thereof.).
Claim Rejections - 35 USC § 103
Claim(s) 6,7,9 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tapily in view of Chu and in view of Sun Investigation of ultrathin yttrium silicide for NMOS source/drain contacts
e. As to claims 6 7, and 12 Chu does not explicitly yttrium and titanium.
Sun teaches forming a stack of a YSiO on silicon forming TiSi thereon (figure 5). For lower contact resistance (abstract and conclusion).
Thus, it would have been obvious to have tried Ti and Yttrium on silicon based on the improved or lower contact resistance of the YTiSi it would have been obvious to one of ordinary skill in the art at the time of filing to have formed the first layer as a Y containing layer and the second layer as Ti and annealed to form a silicide for the lower contact resistance.
b. As to claim 9, Sun and Chu (figures 6B-9B) suggest a NMOS device region
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW L REAMES whose telephone number is (571)272-2408. The examiner can normally be reached M-Th 6:00 am-4:00 pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William F. Kraig can be reached at 571-272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MATTHEW L. REAMES/
Primary Examiner
Art Unit 2896
/MATTHEW L REAMES/Primary Examiner, Art Unit 2896
Prosecution Insights