Prosecution Insights
Last updated: October 02, 2026
Application No. 18/808,790

DISPLAY APPARATUS

Non-Final OA §103
Filed
Aug 19, 2024
Priority
Jul 25, 2019 — RE 10-2019-0090497 +2 more
Examiner
DANG, PHUC T
Art Unit
Tech Center
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
1761 granted / 1845 resolved
+35.4% vs TC avg
Minimal +1% lift
Without
With
+1.3%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
26 currently pending
Career history
1857
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
61.3%
+21.3% vs TC avg
§102
25.6%
-14.4% vs TC avg
§112
9.5%
-30.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1845 resolved cases

Office Action

§103
DETAILED ACTION 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Cross-Reference to Related Applications 2. This application is a CON of 17/457,732 12/06/2021 PAT 12069895 which is a CON of 16/938,087 07/24/2020 PAT 11195893. Oath/Declaration 3. The oath/declaration filed on 08/19/2024 is acceptable. Priority 4. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Information Disclosure Statement 5. The office acknowledges receipt of the following items from the applicant: Information Disclosure Statement (IDS) filed on 08/19/2024 and 01/03/2025. Specification 6. The specification is objected to for the following reason: The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed (see MPEP 606.01). A title such as -- DISPLAY APPARATUS HAVING A NODE CONNECTION LINE CONNECTED TO A FIRST CONTROL ELECTRODE VIA A FIRST CONTACT HOLE AND CONNECTED TO A SECOND SEMICONDUCTOR LAYER VIA A SECOND CONTACT HOLE -- or is suggested by the applicant. The specification needs to be updated. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 7. Claims 1 and 9 are rejected under 35 U.S.C. 103(a) as being unpatentable over Son et al., hereafter “Son” (U.S. Publication No. 2018/0366586 A1) in view of LIM et al., hereafter “LIM” (U.S. Publication No. 2018/0047799 A1). Regarding claim 1, Son discloses a display apparatus comprising: a substrate (100); a display element (400) disposed on the substrate (100); and a pixel circuit (including TFT 210) disposed between the substrate (100) and the display element (400) and connected the display element (400) by a connection electrode (CNT5/CNT1, para [0057]); wherein the pixel circuit comprising: a first thin film transistor (TFT 210) including a first semiconductor layer (211, para [0059]) including silicon (para [0059]) and a first control electrode (213, para [0059]); a second thin film transistor (TFT 220, para [0060]) including a second semiconductor layer (221) including an oxide semiconductor (para [0060]) and a second control electrode (223, para [0060]); and a shielding electrode (210, para [0110]) (Fig. 3A). Son discloses the features of the claimed invention as discussed above, but does not disclose a shielding electrode disposed on a same layer as the connection electrode. LIM, however, discloses a shielding electrode (CSE) disposed on a same layer as the connection electrode (BRP3) (Fig. 23 and para [0258]). It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of Son to provide a shielding electrode disposed on a same layer as the connection electrode as taught by LIM for a purpose of decreasing the parasitic capacitance of a capacitor due to overlapping between lines may be disposed on the first protective layer. Regarding claim 9, Son and LIM (citations to Son unless otherwise noted) discloses wherein the first control electrode (213) is disposed on a different layer from the second control electrode (223) (Fig. 3A). 8. Claim 2 is rejected under 35 U.S.C. 103(a) as being unpatentable over Son and LIM in view of PARK H (KR-20190072060-A1). Regarding claim 2, Son and LIM disclose the features of the claimed invention as discussed above, but does not disclose the pixel circuit further comprising: a first scan line extending a first direction; and a data line extending a second direction crossing the first direction, wherein the data line is disposed on a same layer as the shielding electrode. PARK H, however, discloses the pixel circuit further comprising: a first scan line (217) extending a first direction (X-direction); and a data line (216) extending a second direction (Y-direction) crossing the first direction (X-direction), wherein the data line (216) is disposed on a same layer as the shielding electrode (225) (Figs. 8-9a and English Text). It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of Son and LIM to provide the pixel circuit further comprising: a first scan line extending a first direction; and a data line extending a second direction crossing the first direction, wherein the data line is disposed on a same layer as the shielding electrode as taught by PARK H for a purpose of improving the resolution of the display substrate. 9. Claim 10 is rejected under 35 U.S.C. 103(a) as being unpatentable over Son and LIM in view of KIM J (CN-107799535-A). Regarding claim 10, Son and LIM disclose the features of the claimed invention as discussed above, but does not disclose wherein the second thin film transistor further comprises a third control electrode arranged below the second semiconductor layer to overlap the second semiconductor layer. KIM J, however, discloses wherein the second thin film transistor (T2) further comprises a third control electrode (GE2-1) arranged below the second semiconductor layer (OSP2) to overlap the second semiconductor layer (OSP2) (Fig. 9 and English Text). It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of Son and LIM to provide wherein the second thin film transistor further comprises a third control electrode arranged below the second semiconductor layer to overlap the second semiconductor layer as taught by LEE for a purpose of increasing in power consumption of the display device. Allowable Subject Matter 10. The following is a statement of reason for the indication of allowable subject matter: Regarding claim 11, Son et al. (U.S. Publication No. 2018/0366586 A1) discloses a display apparatus comprising: a substrate (100); a display element (400) disposed on the substrate (100); and a pixel circuit (including TFT 210) disposed between the substrate (100) and the display element (400) and connected the display element (400) by a connection electrode (CNT5/CNT1, para [0057]); wherein the pixel circuit comprising: a first thin film transistor (TFT 210) including a first semiconductor layer (211, para [0059]) including silicon (para [0059]) and a first control electrode (213, para [0059]); a second thin film transistor (TFT 220, para [0060]) including a second semiconductor layer (221) including an oxide semiconductor (para [0060]) and a second control electrode (223, para [0060]); and a shielding electrode (210, para [0110]) (Fig. 3A). LIM et al. (U.S. Publication No. 2018/0047799 A1) discloses a shielding electrode (CSE) disposed on a same layer as the connection electrode (BRP3) (Fig. 23 and para [0258]). SON et al. and LIM et al., however, either alone or together in any combination, do not disclose, teach, or otherwise suggest a feature of “a node connection line connected to the first control electrode via a first contact hole and connected to the second semiconductor layer via a second contact hole; and wherein the first contact hole has a different height from the second contact hole” as cited in the independent claim 11. Claims 12-20 are directly or indirectly depend on the independent claim 11, then, they are also being allowed. Claims 3-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Cited Prior Arts 11. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. LEE et al. (U.S. Publication No. 2017/0330927 A1) discloses a display apparatus comprising a pixel-defining layer 190 exposing the pixel electrode 210 is above the pixel electrode 210. The emission layer 220 is above the pixel electrode 210 exposed by the pixel-defining layer 190. The emission layer 220 may include an organic material including a fluorescent or phosphorescent material for emitting red, green, blue, or white light. The emission layer 220 may include a low molecular organic material or a polymer organic material (Fig. 10 and para [0105]-[0107]). Conclusion 12. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc T. Dang whose telephone number is 571-272-1776. The examiner can normally be reached on 8:00 am-5:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PHUC T DANG/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Aug 19, 2024
Application Filed
Sep 15, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
97%
With Interview (+1.3%)
1y 10m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1845 resolved cases by this examiner. Grant probability derived from career allowance rate.

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