DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1 recites the imitation “performing a lithography process to open a silicon substrate area where a silicon substrate is to be formed.” This limitation renders the claim indefinite because it is unclear whether a silicon substrate formed before a lithography process is performed or after a lithography process is performed.
Claim 1 recites the limitation “stripping a photoresist.” This limitation renders the claim indefinite because there is no step of forming a photoresist and thus, it is unclear if the step of forming a photoresist is performed.
Claims 2-8 are indefinite due to their dependance on indefinite claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over CN ‘144 (CN 114899144, Machine Translation is provided) in view of Basker (US 2016/0284709)), Lin (US 2002/0293758) and Yamada (US 2003/0057487).
Regarding claim 1, CN’144 discloses a method for forming a hybrid substrate of a SOI wafer, comprising the following steps: S1: depositing a layer of mask silicon oxide (Fig.1A, numeral 104a) and then depositing a layer of mask silicon nitride (104B) on the SOI wafer (101); S2: performing a lithography process to open a silicon substrate area (107) where a silicon substrate is to be formed (Fig.1B); S3: removing the mask silicon nitride, the mask silicon oxide, SOI, and BOX above the silicon substrate in the silicon substrate area by dry etch (Fig. 1B; Step 2); S4: stripping a photoresist (“a further improvement in Step 2”): depositing a layer (Fig. 3C, numeral 208a); S6: removing the layer on the SOI area and on the silicon substrate area by dry etch using the directionality of the dry etch, wherein side faces of the mask silicon oxide, the SOI, and the BOX are fully covered with the layer (Fig.3D; Step 4), and a lower portion of the side face of the mask silicon nitride is covered with the layer (Fig.3D); S7: performing growth of epitaxial silicon to cause an upper surface of substrate silicon in the silicon substrate area to grow to be flush with an upper surface of the SOI in the SOI area (Fig. 3E, numeral 209; Step 5); S8: removing the silicon nitride and the silicon oxide in the SOI area (“after Step 5”) .
CN’144 does not disclose (1) that the layer is SiOCN; (2) that the silicon nitride and silicon oxide is removed by wet cleaning (3) during a subsequent etch process for forming an active area removing the layer deposited at a boundary between the SOI area and the silicon substrate area by etch, to form an STI.
Regarding element (1), CN’144 that the layer is formed for protection during subsequent epitaxial growth. And Basker discloses using a SiOCN layer for prevention epitaxial growth from a dielectric sidewall ([0032]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify CN’144 with Basker to form a layer of SiOCN for the purpose of controlling epitaxial growth in the trench (Basker, [0032]).
Regarding element (2), Lin however discloses that the silicon nitride and silicon oxide is removed by wet cleaning ([0014]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify CN’144 with Lin to remove the silicon nitride and silicon oxide is removed by wet cleaning because this is a typical method for removing masking layers (Lin, [0014]).
Regarding element (3), Yamada however discloses during a subsequent etch process for forming an active area removing the layer deposited at a boundary between the SOI area and the silicon substrate area by etch, to form an STI (Fig.3F, 3G, numeral 25; [0067]; [0068]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify CN’144 with Yamada to perform during a subsequent etch process for forming an active area removing the layer deposited at a boundary between the SOI area and the silicon substrate area by etch, to form an STI for the purpose of forming isolation regions (Yamada, [0068]).
Regarding claim 2, CN’144 discloses herein after step S6, by-products generated in a dry etch process of step S6 are removed by wet cleaning, followed by step S7 (page 2, paragraph 9).
Regarding claim 3, CN’144 does not disclose wherein the by-products generated in the dry etch process of step S6 are removed by the wet cleaning using an acid cleaning agent of a first concentration; the acid cleaning agent is phosphoric acid or hydrofluoric acid.
Basker however discloses the wet cleaning using an acid cleaning agent of a first concentration; the acid cleaning agent is phosphoric acid or hydrofluoric acid ([0034]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was field to perform the wet cleaning using an acid cleaning agent of a first concentration; the acid cleaning agent is phosphoric acid or hydrofluoric acid because there are typical materials for performing wet cleaning.
Regarding claim 4, CN’144 does not disclose wherein in step S8, the silicon nitride and the silicon oxide in the SOI area are removed by the wet cleaning using an acid cleaning agent of a second concentration, the second concentration being higher than the first concentration.
It would have been however obvious to one of ordinary skill in the art at the time the invention was filed to adjust the concentrations of acid cleaning agent to be in the claimed range for the purpose of optimization cleaning process.
Regarding claim 5, CN’144 discloses wherein the thickness of the deposited SiOCN in step S5 is 5-10 nm (page 3, paragraph 10).
Regarding claim 6, CN’144 discloses the thickness of the mask silicon oxide is 3-10 nm, and the thickness of the mask silicon nitride is 10 -30 nm (page 3, paragraphs 4 and 5).
Regarding claim 7, CN’144 discloses wherein in step S1, the thickness of the mask silicon oxide is 50 Å; the thickness of the mask silicon nitride is 150 Å (page 3, paragraphs 4 and 5); the thickness of the deposited SiOCN in step S5 is 80 Å (page 3, paragraph 10).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JULIA SLUTSKER whose telephone number is (571)270-3849. The examiner can normally be reached Monday-Friday, 9 am-6 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JULIA SLUTSKER/Primary Examiner, Art Unit 2891
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