Prosecution Insights
Last updated: October 02, 2026
Application No. 18/812,168

METHOD OF MANUFACTURING WAFER

Non-Final OA §103
Filed
Aug 22, 2024
Priority
Aug 28, 2023 — JP 2023-137868
Examiner
DAS, PINAKI
Art Unit
Tech Center
Assignee
DISCO Corporation
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
1y 5m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
46 granted / 53 resolved
+26.8% vs TC avg
Minimal -2% lift
Without
With
+-1.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
34 currently pending
Career history
90
Total Applications
across all art units

Statute-Specific Performance

§103
51.2%
+11.2% vs TC avg
§102
25.0%
-15.0% vs TC avg
§112
22.3%
-17.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 53 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement Acknowledgement is made of Applicant's Information Disclosure Statement (IDS) from PTO-1449. The IDS has been considered. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-6 are rejected under 35 U.S.C. 103 as being unpatentable over Hirata et al. (US 2017/0291255 A1), and further in view of Morikazu et al. (US 2015/0332910 A1). Re Claim 1, Hirata teaches a method of manufacturing a wafer from an ingot, comprising: a separation layer forming step (Figs. 6-7B) of positioning a focused spot of a laser beam (40, Fig. 6, para [0046]) transmittable through the ingot in the ingot (60, Fig. 6, para [0046]) and applying the laser beam to the ingot to form a separation layer (84, Fig. 7B, para [0056]) in the ingot while moving the ingot and the focused spot relatively to each other (Figs. 7A-7B, para [0056]); after the separation layer forming step (Figs. 6-7B), a separating step of applying external forces to the ingot (Fig. 8, para [0057]) to sever the ingot along the separation layer that acts as a separation initiating point, thereby separating a piece of the ingot as the wafer (88, Fig. 8, para [0057]) off from the ingot; Hirata does not disclose a mark forming step after the separating step, where the mark is indicative of a crystal orientation of a material of the wafer. Hirata discloses a crystal orientation determining step (Figs. 4A-5B, paras [0034] – [0045]) and orientation flats (68+70, Figs. 3A-5B, para [0031]) being formed before the wafer separation step in Fig. 8. Related art Morikazu discloses that during the formation of wafer from a single crystal ingot, crystal strains and defects may remain in the peripheral section of the wafer (paras [0006] – [0008]), which would require re-shaping the wafer by removing a peripheral section of the wafer where the crystal strains and defects are remaining (para [0009]). However, this will also result in the loss of the original orientation mark (notch 21, Fig. 1, para [0021], similar to the orientation flats of Hirata) which is/are at the edge of the original wafer. Thus, a mark forming step is performed where a mark is formed further inside the wafer (23, Fig. 4, para [0028]) according to the crystal orientation (notch 21, Fig. 4, para [0028], similar to the crystal orientation determining step and orientation flats of Hirata), before the removal of the peripheral region (Fig. 5), thus retaining the crystal orientation of the material of the wafer. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to form a new mark on the wafer after the separating step in the method of Hirata as disclosed by Morikazu, because, the peripheral section of the newly separated wafer may still contain crystal strains and defects, and needs to be removed which will result in the loss of the original mark. Thus, the new mark is formed further inside the wafer before the removal of the peripheral region, thus retaining the crystal orientation of the material of the wafer. Re Claim 2, Hirata modified by Morikazu teaches the method of manufacturing a wafer according to claim 1, further comprising: before the separating step, a crystal orientation measuring step (crystal orientation determining step, Figs. 4A-5B, paras [0034] – [0045], and orientation flats, 68+70, Figs. 3A-5B, para [0031]) of measuring characteristics with respect to the crystal orientation of the material (paras [0031] – [0045], Hirata), wherein the mark forming step (mark 23, Fig. 4, para [0028], Morikazu) includes determining a position and a shape on the wafer of the mark (Fig. 4, para [0028], Morikazu) formed on the wafer in the mark forming step, on a basis of the characteristics measured in the crystal orientation measuring step (notch 21, Fig. 4, para [0028], Morikazu, similar to the crystal orientation determining step and orientation flats of Hirata). Re Claim 3, Hirata modified by Morikazu teaches the method of manufacturing a wafer according to claim 1, wherein the mark forming step (mark 23, Fig. 4, para [0028], Morikazu) includes processing an outer circumferential portion of the wafer (see Fig. 4, Morikazu) with a laser beam (32, Fig. 4, paras [0023] and [0028], Morikazu) to form the mark on the wafer (see Fig. 4, Morikazu). Re Claim 4, Hirata teaches a method of manufacturing a wafer from an ingot, comprising: a separation layer forming step (Figs. 6-7B) of positioning a focused spot of a laser beam (40, Fig. 6, para [0046]) transmittable through the ingot in the ingot (60, Fig. 6, para [0046]) and applying the laser beam to the ingot to form a separation layer (84, Fig. 7B, para [0056]) in the ingot while moving the ingot and the focused spot relatively to each other (Figs. 7A-7B, para [0056]); after the separation layer forming step (Figs. 6-7B), a separating step of applying external forces to the ingot (Fig. 8, para [0057]) to sever the ingot along the separation layer that acts as a separation initiating point, thereby separating a piece of the ingot as the wafer (88, Fig. 8, para [0057]) off from the ingot; Hirata does not disclose an outer form shaping step of shaping an outer form of the wafer after the separating step. Related art Morikazu discloses that during the formation of wafer from a single crystal ingot, crystal strains and defects may remain in the peripheral section of the wafer (paras [0006] – [0008]), which would require re-shaping the wafer by removing a peripheral section of the wafer where the crystal strains and defects are remaining (para [0009]). Morikazu discloses an outer form shaping step of the wafer (see Figs. 4 and 5) where the peripheral portion (24, Fig. 5, para [0029]) containing the crystal strain and defects are removed (see Fig. 5). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to include an outer form shaping step of the wafer in the method of Hirata as disclosed by Morikazu, because, the peripheral section of the newly separated wafer may still contain crystal strains and defects, which needs to be removed before further processing of the wafer. Re Claim 5, Hirata modified by Morikazu teaches the method of manufacturing a wafer according to claim 4, but Hirata does not disclose a mark forming step after the separating step, where the mark is indicative of a crystal orientation of a material of the wafer. Hirata discloses a crystal orientation determining step (Figs. 4A-5B, paras [0034] – [0045]) and orientation flats (68+70, Figs. 3A-5B, para [0031]) being formed before the wafer separation step in Fig. 8. However, as stated in claim 4 above, Morikazu discloses that during the formation of wafer from a single crystal ingot, crystal strains and defects may remain in the peripheral section of the wafer (paras [0006] – [0008]), which would require re-shaping the wafer by removing a peripheral section of the wafer where the crystal strains and defects are remaining (para [0009]). However, this will also result in the loss of the original orientation mark (notch 21, Fig. 1, para [0021], similar to the orientation flats of Hirata) which is/are at the edge of the original wafer. Thus, a mark forming step is performed where a mark is formed further inside the wafer (23, Fig. 4, para [0028]) according to the crystal orientation (notch 21, Fig. 4, para [0028], similar to the crystal orientation determining step and orientation flats of Hirata), before the removal of the peripheral region (Fig. 5), thus retaining the crystal orientation of the material of the wafer. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to form a new mark on the wafer after the separating step in the method of Hirata as disclosed by Morikazu, because, the peripheral section of the newly separated wafer may still contain crystal strains and defects, and needs to be removed which will result in the loss of the original mark. Thus, the new mark is formed further inside the wafer before the removal of the peripheral region, thus retaining the crystal orientation of the material of the wafer. Re Claim 6, Hirata modified by Morikazu teaches the method of manufacturing a wafer according to claim 5, further comprising: before the separating step, a crystal orientation measuring step (crystal orientation determining step, Figs. 4A-5B, paras [0034] – [0045], and orientation flats, 68+70, Figs. 3A-5B, para [0031], Hirata) of measuring characteristics with respect to the crystal orientation of the material (paras [0031] – [0045], Hirata), wherein the mark forming step (mark 23, Fig. 4, para [0028], Morikazu) includes determining a position and a shape on the wafer of the mark (Fig. 4, para [0028], Morikazu) formed on the wafer in the mark forming step, on a basis of the characteristics measured in the crystal orientation measuring step (notch 21, Fig. 4, para [0028], Morikazu, similar to the crystal orientation determining step and orientation flats of Hirata). Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Hirata et al. (US 2017/0291255 A1) and Morikazu et al. (US 2015/0332910 A1), and further in view of Yamamoto et al. (US 2022/0181174 A1). Re Claim 7, Hirata modified by Morikazu teaches the method of manufacturing a wafer according to claim 4 but does not explicitly disclose an inspecting step of inspecting the wafer to ascertain whether the wafer contains a crystal defect. Morikazu discloses that during the formation of wafer from a single crystal ingot, crystal strains and defects may remain in the peripheral section of the wafer (paras [0006] – [0008]), which would require re-shaping the wafer by removing a peripheral section of the wafer where the crystal strains and defects are remaining (para [0009]). Related art Yamamoto discloses an inspecting step (Figs. 18A-18C, para [0097]) which inspects the wafer for crystal defects and strains which has recently been peeled off from the ingot. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to include an inspecting step in to the method of Hirata modified by Morikazu as disclosed by Yamamoto to determine the extent of crystal defects or strains in the peripheral region of the wafer. Thus, Hirata modified by Morikazu and Yamamoto discloses: after the separating step but before the outer form shaping step, an inspecting step of inspecting the wafer (Figs. 18A-18C, para [0097], Yamamoto) to ascertain whether the wafer contains a crystal defect or not and to detect a position of a crystal defect (crystal defects and strain in the peripheral region of the wafer, paras [0006] – [0008], Morikazu), if any, wherein, if it is ascertained that the wafer has the crystal defect in the inspecting step, the outer form shaping step includes removing the crystal defect by shaping the outer form of the wafer (removing a peripheral section of the wafer where the crystal strains and defects are present, Figs. 4-5, paras [0028] - [0029], Morikazu). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PINAKI DAS whose telephone number is (703)756-5641. The examiner can normally be reached M-F 8-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JULIO MALDONADO can be reached at (571)272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /P.D./Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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Prosecution Timeline

Aug 22, 2024
Application Filed
Aug 25, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
85%
With Interview (-1.8%)
3y 7m (~1y 5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 53 resolved cases by this examiner. Grant probability derived from career allowance rate.

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