Prosecution Insights
Last updated: April 19, 2026
Application No. 18/817,167

MEMORY DEVICE AND CONTROL METHOD THEREOF

Non-Final OA §102
Filed
Aug 27, 2024
Examiner
NGUYEN, VIET Q
Art Unit
2827
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Winbond Electronics Corp.
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
1y 11m
To Grant
99%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allow Rate
1182 granted / 1244 resolved
+27.0% vs TC avg
Minimal +4% lift
Without
With
+3.6%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
15 currently pending
Career history
1259
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
26.1%
-13.9% vs TC avg
§102
34.1%
-5.9% vs TC avg
§112
23.6%
-16.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1244 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . 1. Claims 1-20 are present for examination. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 2. Claims 1-4, 6-7, 11-14, 16-17 & 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Park (US 2020/0135283). Claims 1, 11 & 20, Park (Fig. 1-2) shows a memory device comprising a non-volatile memory blocks (i.e., BK1 to BKz), a logic/control circuit (130) coupled to memory blocks BK and configured to receive an erasing command (Fig. 8) for performing erasing. Additionally, Fig. 8 further shows that during the erase operation, there are also multiple of “suspend events” by the system CMD, see “suspend/pause command CMD”, and after each suspend period is expired, it is considered that the erase process can be resumed thereon. Thus, the number of “suspend events” is always followed by the corresponding number of “resume of erasing events” as well, and thus by counting the total number of these events separately or both events together (I.e., either suspend events and/or resume events), a skilled person in this art could continue the erase process or perform a following “soft-program” operation after these events expired, see also tables in Fig. 11-15 for more details. Furthermore, Fig. 15 shows that the total of “suspend counts” can also be feed into a special “soft-program processor” for performing any soft-programming operations, which is also based on the claimed” threshold value” based on the total count numbers as well. Particularly, para [0062] stated that “…the soft-program setting table 212 store the soft program voltage setting depending on the number suspend/resume cycles.. etc.”, thus also inherently suggest that if a certain number of counting events (or threshold) have been reached differently, then plurality of different “soft-program pulses” are also be applied to the memory cells accordingly. PNG media_image1.png 342 888 media_image1.png Greyscale PNG media_image2.png 302 748 media_image2.png Greyscale Claims 2-3 & 12-13, Figs. 14-15 show usage of a “suspend detector” circuitry configured to count/increment the number of two events’ commands (I.e., suspend or erase), and feed that count number to the soft-program circuit (213) for perform soft programming base don the predetermined “threshold number” reached (see threshold cou8nt tables in Figs. 11-15.). Claims 4 & 14, Fig. 17 shows method with counting and comparing steps (S1703-S1709), for determining when to perform the soft-program step (S1711-S1713) when certain the total number of counting events (suspend or erase) is reached (or predetermined threshold count/value). Claims 6 & 16, Fig. 6 shows the erase verify steps (VFY step), if any, are also performed during any erase operation. Claims 7 & 17, Fig. 10 show usage of a plurality of “second soft-programs” steps second operations as claimed. Allowable Subject Matter 4. Claims 5, 8, 15 & 18-19 are objected as being dependent upon the rejected claims above, but they contain additional limitations to the recited structures above, which are not all suggested by the prior arts herein or seen elsewhere at this time. 5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VIET Q NGUYEN whose telephone number is (571)272-1788. The examiner can normally be reached M-F 7:30-3PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at 571-272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VIET Q NGUYEN/Primary Examiner, Art Unit 2827
Read full office action

Prosecution Timeline

Aug 27, 2024
Application Filed
Jan 27, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12591508
NON-VOLATILE MEMORY AND ASSOCIATED CONTROL METHOD
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
99%
With Interview (+3.6%)
1y 11m
Median Time to Grant
Low
PTA Risk
Based on 1244 resolved cases by this examiner. Grant probability derived from career allow rate.

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