Prosecution Insights
Last updated: August 15, 2026
Application No. 18/823,105

PROCESSING METHOD

Non-Final OA §102
Filed
Sep 03, 2024
Priority
Sep 12, 2023 — JP 2023-147446
Examiner
NEIBAUR, ROBERT F
Art Unit
Tech Center
Assignee
DISCO Corporation
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
289 granted / 378 resolved
+16.5% vs TC avg
Strong +32% interview lift
Without
With
+32.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
38 currently pending
Career history
406
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
48.4%
+8.4% vs TC avg
§102
22.8%
-17.2% vs TC avg
§112
27.4%
-12.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 378 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims This action is in reply to the application filed on 09/03/2024. Claims 1-3 are currently pending and have been examined. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nakamura et al (Japanese Patent Publication No. JP2016127098) as evidenced by the machine translation, hereinafter referred to as Nakamura. Regarding claim 1, Nakamura discloses a processing method for thinning a wafer [Nakamura, fig 3, 11] having a first surface [Nakamura, fig 3, 11a] and a second surface opposite to the first surface [Nakamura, fig 3, 11b, which is opposite 11a] and formed with a chamfered portion on an outer periphery to a predetermined thickness by grinding the second surface [Nakamura, figs 4a-4b, showing 22 backgrinds the second surface 11b], the processing method comprising: forming an annular groove from the first surface side of the wafer along an outer peripheral edge of the wafer to the predetermined thickness [Nakamura, fig 3, 23 is formed on surface 11a around the periphery of 11a by 16] and forming a remaining portion below the annular groove [Nakamura, fig 3, showing 23 is tapered by tapered surface 16a of grindstone 16 and page 11, pp 0017], the annular groove being formed so that a distance between a groove bottom and the second surface side decreases from a center side of the wafer toward the outer peripheral edge side of the wafer and a position of the groove bottom in a thickness direction of the wafer varies in a width direction [Nakamura, fig 3, showing that the surface 23 is formed to match that of 16a, and page 10, pp 0016 and page 11, pp 0018]; and after forming the annular groove and the remaining portion is performed, bringing a grinding stone into contact with the second surface of the wafer and moving the grinding stone in the thickness direction of the wafer to grind the second surface side of the wafer while crushing and removing the remaining portion, so as to thin the wafer to the predetermined thickness [Nakamura, figs 4a-4b, showing 22, which has grindstone 28, backgrinds 11b and page 14, pp’s 0022-0023]. Regarding claim 2, Nakamura further discloses the processing method according to claim 1, wherein forming the annular groove and the remaining portion includes cutting the wafer with a cutting blade having a tip cross section of a single-sided V-shape [Nakamura, fig 3, 16 has a tapered single-sided V-shape 16a], the cutting blade having a first surface and a second surface opposite to the first surface [Nakamura, fig 3, 16 has left surface and a right surface, opposite the left surface], a diameter on the second surface side being set to a value larger than a diameter on the first surface side [Nakamura, fig 3, showing that the taper of 16a such that the right surface of 16 is larger than the left surface of 16 to form the taper 16a, and page 10, pp 0016]. Regarding claim 3, Nakamura further discloses the processing method according to claim 1, wherein forming the annular groove and the remaining portion includes cutting the wafer with a cutting blade at different positions in a width direction of the annular groove at different cutting depths [Nakamura, fig 3, showing that blade 16 has a taper and thus cuts 11 at different positions in a width direction, where the Office notes that there is no distance or spacing claimed between each different cutting depth, such that the cutting depth and different portions may approach infinitely small and may appear to be continuous]. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Higaki (Japanese Patent Publication No. JP2014027000) teaches in figure 7 a tapered grindstone to form a tapered annular groove on the wafer. Priewasser (US PGPUB No. 2015/0332911) teaches a method of backgrinding a wafer. Watanabe (Japanese Patent Publication No. JP2015050296) teaches in figs 2-3 discrete annular groove steps and depths (d1 and d2). Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT NEIBAUR whose telephone number is (571)270-7979. The examiner can normally be reached M - F 8:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Posigian can be reached at 313-446-6546. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBERT F NEIBAUR/Primary Examiner, Art Unit 3723
Read full office action

Prosecution Timeline

Sep 03, 2024
Application Filed
Jul 17, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+32.3%)
2y 10m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 378 resolved cases by this examiner. Grant probability derived from career allowance rate.

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