DETAILED ACTION
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/3/2025 and 2/11/2026 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 16-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wu (US 20210336034 A1)
Regarding claim 1, Wu discloses A method for forming a semiconductor device structure (¶ [0006]), comprising:
(Fig. 3, ¶ [0017]) forming a plurality of sacrificial layers (206) and a plurality of semiconductor layers (208) laid out in an alternating manner on a substrate (202);
(Fig. 6, ¶ [0022]) partially removing the semiconductor layers and the sacrificial layers to form a first recess (228) exposing side edges of the semiconductor layers and the sacrificial layers;
(Fig. 7, ¶ [0023]) partially removing the sacrificial layers from the side edges of the sacrificial layers to form a plurality of second recesses (230);
(Fig. 8, ¶ [0024]) introducing modifying elements (silicon, carbon, oxygen, nitrogen) into the sacrificial layers and the semiconductor layers to transform surface portions of the sacrificial layers and the semiconductor layers into a modified layer (232), wherein the modifying elements comprises nitrogen, carbon, boron, or a combination thereof;
(Fig. 9, ¶ [0025]) forming an inner spacer layer (234) over the modified layer; and
(Fig. 10, [0026]) removing the inner spacer layer and the modified layer outside of the second recesses, wherein remaining portions of the inner spacer layer and the modified layer form inner spacers and modified elements, respectively.
Regarding claim 2, Wu discloses the method of claim 1, wherein the sacrificial layers comprise silicon germanium (¶ [0016]).
Regarding claim 3, Wu discloses the method of claim 2. Wu further discloses (¶ [0016]) the sacrificial layers comprises silicon germnium and the semiconductor layer silicon; (Fig. 8, ¶ [0024]) discloses an atomic layer deposition process applying gaseous precursors (carbon, oxygen, nitrogen) onto the side portions of the sacrificial layers and the semiconductor layer, thus an oxidation will cause the side portions of the surface portions of the sacrificial layers to comprise silicon-germanium oxide, and the surface portions of the semiconductor layers to comprise silicon oxide.
Regarding claim 4, Wu discloses the method of claim 1, wherein the sacrificial layers are made of an oxide material (¶ [0023 disclosing the selective and partial recess of sacrificial layers including a SiGe oxidation process).
Regarding claim 5, Wu discloses the method of claim 1, further comprising: (Fig. 11, ¶ [0027]) forming an epitaxial structure (242) in the first recess (228) to cover the side edges of the semiconductor layers, the inner spacers, and the modified elements;
(Fig. 14, ¶ [0030]) removing the sacrificial layers (forming 249) to release a plurality of semiconductor nanostructures constructed by remaining portions of the semiconductor layers after the epitaxial structure is formed; and
(Fig. 15, ¶ [0031]) forming a metal gate stack (254) wrapped around the semiconductor nanostructures.
Regarding claim 6, Wu discloses the method of claim 1, wherein the modifying elements are introduced into the sacrificial layers and the semiconductor layers by exposing the surface portions of the sacrificial layers and the semiconductor layers to a nitrogen-containing atmosphere, a carbon-containing atmosphere, a boron-containing atmosphere, or a combination thereof (¶ [0016]).
Regarding claim 16, Wu discloses (Fig. 16) A semiconductor device (200), comprising: a plurality of semiconductor nanostructures (alternating 2080T and the layer comprising 240, 252, 254); a gate stack (254) wrapped around the semiconductor nanostructures; an epitaxial structure (252) connecting the semiconductor nanostructures; a plurality of inner spacers (232 + 234) between the epitaxial structure and the gate stack; and a plurality of protective elements (carbon, oxygen, nitrogen from the ALD process into the channel and dummy layers, ¶ [0024]), wherein each of the protective elements is positioned between the gate stack (254) and a respective inner spacer (234) of the inner spacers, and the protective elements contain nitrogen, carbon, boron, or a combination thereof.
Regarding claim 17, Wu discloses the semiconductor device of claim 16, wherein the protective elements comprise nitrogen-containing silicon oxide, nitrogen-containing silicon-germanium oxide, carbon-containing silicon oxide, carbon-containing silicon-germanium oxide, boron-containing silicon oxide, boron-containing silicon-germanium oxide, or a combination thereof (ALD of si, carbon, oxygen, nitride to the channel layer dummy layer forms SiOCN, ¶ [0024]).
Regarding claim 18, Wu discloses the semiconductor device of claim 16, wherein the inner spacers have an atomic concentration of an element higher than that of the protective elements, and the element comprises nitrogen, carbon, boron, or a combination thereof (¶ [0024]).
Regarding claim 19, Wu discloses the semiconductor device of claim 16, wherein (Figs. 11, 14, ¶ [0027]) the epitaxial structure is in direct contact with the inner spacers and the protective elements.
Regarding claim 20, Wu discloses the semiconductor device of claim 16, wherein (Fig. 16) the inner spacers (234) are separated from the semiconductor nanostructures (alternating 2080T and the layer comprising 240, 252, 254) by the protective elements (232).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 10-11, 15 is/are rejected under 35 U.S.C. 103 as being unpatentable by Wu (US 20210336034 A1)
Regarding claim 10, Wu discloses the method of claim 1. While being silent regarding each of the modified elements (232, Fig. 8) is formed to have a thickness in a range from about 3 angstroms to about 15 angstroms, Wu discloses a thickness of the modified element between about 0.5 nm and about 2nm (5 angstroms to 20 angstroms) (¶ [0024]). Absent unpredictable results, one of ordinary skill the art before the effective filing date of the invention would have selected the thickness range of the modified layer from the disclosure of Wu to be between 3 angstroms to 15 angstroms through routine optimization.
Regarding claim 11, Wu discloses A method (¶ [0006]) for forming a semiconductor device structure, comprising:
(Fig. 3, ¶ [0017]) forming fin structure having a plurality of sacrificial layers (206) and a plurality of semiconductor layers (208) laid out in an alternating manner on a substrate;
(Figs. 4-5, ¶ [0019]) forming a dummy gate stack extending across the fin structure;
(Fig. 6, ¶ [0022]) partially removing the semiconductor layers and the sacrificial layers to form a first recess (228) exposing side edges of the semiconductor layers and the sacrificial layers;
replacing the sacrificial layers with dielectric sacrificial layers (¶ [0023] disclosing (¶ [0023] disclosing ‘the selective and partial recess of the sacrificial layers 206 may include a SiGe oxidation process followed by a SiGe oxide removal. In that embodiments, the SiGe oxidation process may include use of ozone (03)’; thus 206 is turned into a dielectric on top surface by the oxidation process);
(Fig. 7, ¶ [0023]) partially removing the dielectric sacrificial layers from side edges of the dielectric sacrificial layers to form a plurality of second recesses (230);
(Fig. 8, ¶ [0024]) modifying surface portions of the dielectric sacrificial layers with modifying elements (silicon, carbon, oxygen, nitrogen) to transform the surface portions into modified elements (interfacial layer 232 formed by ALD nitrogen, carbon, oxygen into the side surface of 206 and 208), wherein the modifying elements comprises nitrogen, carbon, boron, or a combination thereof;
(Fig. 9, ¶ [0025]) forming inner spacers (234) covering the modified elements in the second recesses;
(Fig. 14, ¶ [0030]) removing the dummy gate stack and the dielectric sacrificial layers (206 after oxidation) to release a plurality of semiconductor nanostructures constructed by remaining portions of the semiconductor layers; and
(Fig. 15, ¶ [0031]) forming a metal gate stack wrapped around the semiconductor nanostructures.
Regarding claim 15, Wu discloses the method of claim 11, further comprising: (Figs. 11, 14, ¶ [0027]) forming a source/drain epitaxial structure in the first recess, wherein the source/drain epitaxial structure is formed to be in direct contact with the inner spacers (234 in 240) and the modified elements (232 in 240).
Claim(s) 7-8, 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable by Wu (US 20210336034 A1) in view of Sasajima (US 20140080314 A1)
Regarding 7, Wu discloses the method of claim 6. Wu discloses wherein the modifying elements comprise nitrogen (¶ [0024]). Though disclosing forming a silicon oxycarbonitride (SiOCN) from ALD silicon, carbon, oxygen, nitride (¶ [0024]) as the material for the first inner spacer (232, Fig, 8), Wu is silent regarding and the modifying elements are introduced into the sacrificial layers and the semiconductor layers by exposing the surface portions of the sacrificial layers and the semiconductor layers to NH3 gas at a temperature in a range from about 550 degrees C to about 600 degrees C for a duration of about 10 minutes to about 2 hours.
Sasajima discloses the formation of SiOCN from nitriding gas NH3 and other elements allowing for a sequence of steps in a predetermined number of repeated cycles (¶ [0089]) and during the exposure to the NH3 gas, the temperature of the chamber is set from 300 to 600 degree C for a duration of about 1 to 600 seconds (¶ [0094]).
Artisans in the art would have appreciated the nitrogen precursor coming from the nitriding gas NH3 is the most widely used and essential gas for nitriding because it thermally dissociates at typical nitriding temperature of about 500-580 degree C into atomic nitrogen and hydrogen, which diffuse into a material to form a hard nitride layer. Thus, make it the only practical gas for most gas nitriding applications. As such, it would have been obvious to ordinary skill in the art before the effective filing date of the invention to apply the nitriding gas NH3 as taught by Sasajima to the formation of SiOCN of Wu and select the exposing temperature of 550 to 600 degree C for a duration of 10 minutes to 2 hours to optimize the applications.
Regarding claim 8, Wu discloses the method of claim 1. Wu discloses the modifying element comprises carbon (¶ [0024]). Wu is silent regarding the modifying elements are introduced into the sacrificial layers and the semiconductor layers by exposing the surface portions of the sacrificial layers and the semiconductor layers to C3H6 gas at a temperature in a range from about 550 degrees C to about 650 degrees C for a duration of about 10 minutes to about 2 hours.
Sasajima discloses the formation of SiOCN from carbon-containing gas C3H6 and other elements allowing for a sequence of steps in a predetermined number of repeated cycles (¶ [0089]) and during the exposure to the C3H6 gas, the temperature of the chamber is set from 300 to 650 degree C for a duration of about 1 to 200 seconds (¶ [0107]).
Artisans in the art would have appreciated the carbon precursor coming from the C3H6 is the most widely used because it is abundant and inexpensive. Thus, make it a common and practical gas for SiOCN formation. As such, it would have been obvious to ordinary skill in the art before the effective filing date of the invention to apply carbon-containing gas as taught by Sasajima to the formation of SiOCN of Wu and select the exposing temperature of 550 to 600 degree C for a duration of 10 minutes to 2 hours to optimize the applications.
Regarding claim 12, Wu discloses the method of claim 11, wherein the modifying elements comprise nitrogen (¶ [024]). Wu is silent regarding the modifying elements are introduced into the dielectric sacrificial layers and the semiconductor layers by exposing the surface portions of the dielectric sacrificial layers and the semiconductor layers to NH3 gas at a temperature in a range from about 550 degrees C to about 600 degrees C for a duration of about 10 minutes to about 2 hours.
Sasajima discloses the formation of SiOCN from nitriding gas NH3 and other elements allowing for a sequence of steps in a predetermined number of repeated cycles (¶ [0089]) and during the exposure to the NH3 gas, the temperature of the chamber is set from 300 to 600 degree C for a duration of about 1 to 600 seconds (¶ [0094]).
Artisans in the art would have appreciated the nitrogen precursor coming from the nitriding gas NH3 is the most widely used and essential gas for nitriding because it thermally dissociates at typical nitriding temperature of about 500-580 degree C into atomic nitrogen and hydrogen, which diffuse into a material to form a hard nitride layer. Thus, make it the only practical gas for most gas nitriding applications. As such, it would have been obvious to ordinary skill in the art before the effective filing date of the invention to apply the nitriding gas NH3 as taught by Sasajima to the formation of SiOCN of Wu and select the exposing temperature of 550 to 600 degree C for a duration of 10 minutes to 2 hours to optimize the applications.
Regarding claim 13, Wu discloses the method of claim 11, wherein the modifying elements comprise carbon (¶ [0024]). Wu is silent regarding the modifying elements are introduced into the dielectric sacrificial layers and the semiconductor layers by exposing the surface portions of the dielectric sacrificial layers and the semiconductor layers to C3H6 gas at a temperature in a range from about 550 degrees C to about 650 degrees C for a duration of about 10 minutes to about 2 hours.
Sasajima discloses the formation of SiOCN from carbon-containing gas C3H6 and other elements allowing for a sequence of steps in a predetermined number of repeated cycles (¶ [0089]) and during the exposure to the C3H6 gas, the temperature of the chamber is set from 300 to 650 degree C for a duration of about 1 to 200 seconds (¶ [0107]).
Artisans in the art would have appreciated the carbon precursor coming from the C3H6 is the most widely used because it is abundant and inexpensive. Thus, make it a common and practical gas for SiOCN formation. As such, it would have been obvious to ordinary skill in the art before the effective filing date of the invention to apply carbon-containing gas as taught by Sasajima to the formation of SiOCN of Wu and select the exposing temperature of 550 to 600 degree C for a duration of 10 minutes to 2 hours to optimize the applications.
Claim(s) 9, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable by Wu (US 20210336034 A1) in view of Murakami (US 20200219716 A1)
Regarding claim 9, Wu discloses the method of claim 1. Wu is silent regarding the modifying elements comprise boron, and the modifying elements are introduced into the sacrificial layers and the semiconductor layers by exposing the surface portions of the sacrificial layers and the semiconductor layers to boron-containing plasma.
Murakami discloses (¶ [0115]) a silicon nitride film (SiOCN) is modified by one or more elements selected from oxygen, carbon, boron, and fluorine in an an additionally provided step. Artisans in the art would have appreciated adding boron to SiOCN will enhance chemical stability and thermal resistance of SiOCN as boron can form stable boron-oxygen or boron-nitrogen bonds, which helps reduce reactivity and degradation under heat or chemical exposure. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to add boron into SiOCN in an additional step as taught by Murakami to the inner spacer material of Wu to enhance the stable structure of the inner spacer.
Regarding claim 14, Wu discloses the method of claim 11. Wu is silent regarding wherein the modifying elements comprise boron, and the modifying elements are introduced into the dielectric sacrificial layers and the semiconductor layers by using an ion implantation process.
Murakami discloses (¶ [0115]) a silicon nitride film (SiOCN) is modified by one or more elements selected from oxygen, carbon, boron, and fluorine in an an additionally provided step. Artisans in the art would have appreciated adding boron to SiOCN will enhance chemical stability and thermal resistance of SiOCN as boron can form stable boron-oxygen or boron-nitrogen bonds, which helps reduce reactivity and degradation under heat or chemical exposure. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to add boron into SiOCN in an additional step as taught by Murakami to the inner spacer material of Wu to enhance the stable structure of the inner spacer.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wostyn (US 11996459 B2) discloses a GAA FET architecture including a liner separating the gate structure from the inner spacer.
Conclusion
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/DTH/Examiner, Art Unit 2898
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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