Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the application filed on 08/06/24. Claims 1-6 are pending.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) were submitted on 9/26/24 and 6/18/26. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 7-14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kimura (US PGPub 2019/0681621, hereinafter referred to as “Kimura”).
Kimura discloses the semiconductor device and method as claimed. See figures 1-15 and corresponding text, where Kimura teaches, in claim 7, a substrate for a high-frequency device comprising: (figure 1; [0032-0039])
a support substrate (2) having unevenness on a surface thereof;
a diamond layer (3) on the surface of the support substrate; and
a silicon oxide film layer (5) on the diamond layer.
Kimura teaches, in claim 8, wherein the surface of the support substrate has a surface roughness (Sa) measured by AFM of 1 nm or more (figures 9-12; [0060-0078]).
Kimura teaches, in claim 9, wherein the support substrate having unevenness on the surface has a resistivity of 500 Ω.Math.cm or more (figures 9-12; [0060-0078]).
Kimura teaches, in claim 10, wherein the support substrate having unevenness on the surface has a resistivity of 500 Ω.Math.cm or more (figures 9-12; [0060-0078]).
Kimura teaches, in claim 11, a method for producing a substrate for a high-frequency device, the method comprising the steps of: (figure 1; [0032-0039])
providing a support substrate (2);
forming unevenness on a surface of the support substrate;
forming a diamond layer (3) on the surface of the support substrate; and
forming a silicon oxide film layer (5) on the diamond layer.
Kimura teaches, in claim 12, wherein the step of forming unevenness on the surface of the support substrate is the step of forming roughness so as to make a surface roughness (Sa) of the support substrate measured by AFM of 1 nm or more (figures 9-12; [0060-0078]).
Kimura teaches, in claim 13, wherein the support substrate has a resistivity of 500 Ω.Math.cm or more (figures 9-12; [0060-0078]).
Kimura teaches, in claim 14, wherein the support substrate has a resistivity of 500 Ω.Math.cm or more (figures 9-12; [0060-0078]).
Conclusion
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/STANETTA D ISAAC/Examiner, Art Unit 2898 July 25, 2026
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