DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shunichi (JP 2008-103390A).
Regarding claim 1, Shunichi teaches (FIG. 4-15):
A chip attaching device configured to attach a chip having a second device to a device substrate having multiple first devices on a main surface thereof, the second device being to be electrically connected to the first device (stacking chip 16 on chip 15), the chip attaching device comprising:
a first carrier holder configured to hold a chip carrier which has, on a front surface thereof, multiple attraction portions, the attraction portion being configured to electrostatically attract the chip (Table 19);
a substrate holder configured to hold the device substrate (stage 14);
a pickup device (collet 9) configured to separate the chip from the chip carrier held by the first carrier holder; and
a mounting device configured to mount the chip separated from the chip carrier by the pickup device on the device substrate held by the substrate holder (mounting chip 16 on chip 15).
Regarding claim 10, Shunichi teaches (FIG. 4-15):
A chip processing method, comprising:
attaching a chip (16) having a second device to a device substrate having multiple first devices (15) on a main surface thereof, the second device being to be electrically connected to the first device, wherein the attaching of the chip to the device substrate comprises:
holding, with a first carrier holder, a chip carrier having, on a front surface thereof, multiple attraction portions, the attraction portion being configured to electrostatically attract the chip (Table 19);
holding the device substrate with a substrate holder (stage 14);
separating the chip from the chip carrier held by the first carrier holder (Collet 9); and
mounting the chip separated from the chip carrier on the device substrate held by the substrate holder (mounting chip 16 on chip 15).
Allowable Subject Matter
Claims 2 – 9, and 11 – 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record fails to teach or fairly render obvious a carrier substrate having the front surface and a rear surface opposite to the front surface; multiple electrodes provided in the carrier substrate to generate an attracting force to electrostatically attract the chip on each of the attraction portions individually; and an operation terminal provided in the carrier substrate to be connected to a first attracting force controller configured to control the attracting force, the front surface of the carrier substrate has a recess at a periphery of each of the multiple attraction portions, and the recess is recessed more than the attraction portion, and the pickup device comprises a side holding head configured to be inserted into the recess to hold a side surface of the chip; and a first head moving mechanism configured to move the side holding head, in combination with the other limitations of the claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CORY W ESKRIDGE whose telephone number is (571)272-0543. The examiner can normally be reached M - F 9 - 5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Madonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CORY W ESKRIDGE/Primary Examiner, Art Unit 2898
Prosecution Insights