DETAILED ACTION
Contents
Notice of Pre-AIA or AIA Status 2
Claim Interpretation 2
Claim Rejections - 35 USC § 101 5
Claim Rejections - 35 USC § 102 5
Claim Rejections - 35 USC § 103 15
Allowable Subject Matter 25
Conclusion 25
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to applicant’s claim set received on 9/10/24. Claims 1-8 are currently pending.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “an imaging device configured to image a substrate accommodated in the container” in claim 6.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-8 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter as follows. Claims 1, 6 and 7 recite an abstract idea comprising a mental process, without reciting additional elements sufficient to integrate the judicial exception into a practical application or amount to significantly more than the judicial exception. Claims 2-5, 8 are rejected under the same rationale as stated above for claims 1, 6 and 7.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless - (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3, 6 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Garssen et al (US 2005/0035313 A1). Regarding claim 1, Garssen discloses a substrate detection method, comprising: detecting an accommodation state of a substrate based on first imaging data obtained by imaging the substrate accommodated in a slot of a container (see 0012, 0030, 0034; According to another aspect of the invention, a method for evaluating a loading of a stack of wafers in wafer slots of a cassette is provided. The method comprises taking a plurality of images of the edge portions of the wafers using a digital camera. The images are taken through an at least partially transparent part of a closed cassette. The camera is moved relative to the cassette in the stack direction to take the plurality of images, such that at least one image of each wafer slot is taken and each image covers less than all of the wafer slots. The images are processed to detect the presence of a wafer edge and to provide output data to represent the loading status of each wafer slot….An imaging system with an image sensor is provided for gathering information on wafers in a cassette. Typically, the cassette is a closed structure such as a FOUP and at least a part of the cassette is at least partially transparent to radiation emitted from a radiation source. The source of radiation is preferably disposed outside the cassette and the radiation is preferably directed through the transparent part of the cassette, to an edge portion of the wafers inside the cassette. The sensor is aligned to detect radiation reflected or coming from the wafers through the transparent part of the cassette. Data from the sensor is processed to determine the loading status and orientation of the wafers in the cassette…. The source of radiation can direct a beam of radiation to the edge of the wafer and the reflection of the beam can be measured by a sensor. Preferably the sensor is an imaging sensor, such as a video camera, an X-ray camera or an acoustic camera configured to create an image of, or at least part of, the wafers stored inside a cassette. In addition, the imaging sensor is preferably a digital sensor, e.g., a digital camera, that outputs a digital image) from a first height and second imaging data obtained by imaging the substrate from a second height (see 0035, 0012, 0060, 0057; In one preferred embodiment, at least two images are taken of each wafer slot, but from different angles, e.g., from different vertical and/or horizontal positions. Multiple images of a wafer slot can be advantageous because the part of the cassette that is at least partly transparent might be inflicted with local obstructions or local highly reflective areas such as ribs in the cassette housing, labels, scratches or other features. Therefore, redundant information is preferably generated. At least two images, at different angles relative to a horizontal plane (e.g., the horizontal plane occupied by the wafer slot), are taken of each wafer slot so that if an obstruction renders one of the images, or an area of one of the images, useless, that image or that area of the image can be ignored and the other images can be used to analyze the wafer loading…. The flow chart shown in FIG. 8 illustrates the steps to produce a wafer map, utilizing the wafer-imaging system 11. In step 810, a closed wafer cassette such as a FOUP is positioned on a specified wafer mapping location, for example, a cassette load port of a processing tool (not shown). In step 820, a wafer imaging system takes images of the slots of the closed wafer cassette such as by vertically translating one or more cameras relative to the closed, partly transparent wafer cassette and by taking images at a plurality of vertical positions of the camera(s) relative to the cassette in such a way that at least two images from different angles are taken of each slot position. Preferably, at least two images are taken of each slot position. The images acquired are used for cassette recognition and corresponding wafer image filter selection, as well as for wafer slot status determination…. In step 870 the slot status is determined for the wafer slots of the cassette, based on the analysis of the results for all search areas 52 not filtered out by the wafer image filter. A wafer is determined to be correctly placed in a slot in the FOUP 5 if a predefined percentage, for example, about 90% or more, of the search areas 52 for a certain wafer are "positive." Alternatively, if only a predefined percentage, for example, about 10% or less, of the search areas 52 for a certain wafer are "positive", the wafer is determined to be absent. Other percentages may be chosen, depending on circumstances, such as about 80%/20%, or about 95%/5%. In step 880 a wafer map is constructed based upon the status of each wafer slot, as determined in step 870. In step 885 the FOUP is approved for further processing or rejected. Approval can be dependent on a match of the determined wafer map with an expected wafer map. In other systems, an expected wafer map might not be known and approval is only dependent on the absence of any cross-slotted or broken wafers. When the FOUP is approved for further processing, the FOUP can be opened and the wafers can be transferred into a processing tool, as indicated in step 890. When the FOUP is rejected, further processing is suspended, as indicated in step 895).
Regarding claim 3, Garssen discloses wherein the first imaging data is obtained by imaging at an accommodation position of a substrate which is accommodated a predetermined number of stages ahead of the substrate to be imaged, and wherein the second imaging data is obtained by imaging at an accommodation position of a substrate which is accommodated the predetermined number of stages behind the substrate to be imaged (see 0041, 0038, 0057).
Regarding claim 6, Garssen discloses a load port, comprising: a container configured to accommodate substrates in multiple stages (see 0013; According to yet another aspect of the invention, a system is provided for detecting a load condition of a plurality of wafer slots in a wafer transport module. The system comprises at least one radiation source. At least part of the wafer transport module is at least partially transparent to the radiation emitted from the at least one radiation source. The radiation source is positioned and aligned to direct the radiation emitted from it through the at least partially transparent part of the wafer transport module to an edge portion of a wafer upon retention of the wafer in one of the wafer slots. At least one image sensor is provided and aligned to detect radiation reflected from the edge portion of the wafer upon retention of the wafer in the slot. The at least one image sensor has a field of view covering at least one wafer slot and is configured to provide output signals representative of the edge portion of the wafer. The system also comprises a positioning/aligning mechanism to position/align the at least one image sensor relative to the wafer transport module, wherein the wafers are accommodated horizontally oriented and stacked in a vertically spaced apart relationship, and in a horizontal position so that an uppermost field of view covers a top wafer slot and a lowermost field of view covers a lowest wafer slot in the wafer transport module. A controller is in communication with the at least one image sensor and the positioning/aligning mechanism. The controller is configured to position and/or align the at least one image sensor to capture a plurality of images of a wafer, upon retention of the wafer in one of the wafer slots, from different angles relative to the wafer slot, so that each wafer slot is covered by at least two images. One of the at least two images provides a view of the wafer from a different angle relative to the wafer slot than a remainder of the at least two images. An image processor in communication with the at least one image sensor is adapted to process images from the at least one image sensor and to provide output data representing a loading status of each wafer slot. The image processor is also adapted to ignore information from parts of the images deteriorated by obstructions in the at least partially transparent part of the wafer transport module.); an imaging device configured to image a substrate accommodated in the container (see 0034, 0037-0038; The source of radiation can direct a beam of radiation to the edge of the wafer and the reflection of the beam can be measured by a sensor. Preferably the sensor is an imaging sensor, such as a video camera, an X-ray camera or an acoustic camera configured to create an image of, or at least part of, the wafers stored inside a cassette. In addition, the imaging sensor is preferably a digital sensor, e.g., a digital camera, that outputs a digital image….. FIGS. 3A, 3B and 3C show an exemplary wafer imaging system 11 positioned proximate a closed, partly transparent, FOUP 5. The imaging system 11 comprises an imaging sensor 12, illustrated as a camera, a radiation source 13 and an image processor (not shown). The camera 12 and the radiation source 13 are located outside of the FOUP 5 and preferably in front of a transparent window 8, which is integrated in FOUP door 6, as shown in FIG. 3B and FIG. 3C. The transparent window 8 at least partly transmits the radiation, produced by radiation source 13, which is directed towards the edges of wafers 4. The camera 12 and the radiation source 13 are shown located at a fixed position with respect to each other and are together vertically translatable relative to FOUP 5. Although in FIGS. 3A and 3B the viewing axis of camera 12 is shown to be perpendicular to the plane of the FOUP door 6, a different alignment can be chosen, such that the viewing axis of the camera is at an angle, but not perpendicular to door 6. Also, the alignment of the radiation source can be changed relative to the alignment shown in FIGS. 3A and 3B. In a further embodiment, the radiation source 13 can be movable relative to camera 12 and at a fixed position relative to the FOUP 5. [0038] The dotted rectangle indicated in FIG. 3C is the field of view 10 of the camera 12. The radiation source 13, for example, an IR source, illuminates the edges of wafers 4 located in the field of view 10 at a light level sufficient to allow the camera 12 to capture a "processable" image. The camera 12 can capture a number of images at different vertical positions relative to FOUP 5. The images are preferably mutually overlapping and each image covers two or more wafers 4. The image processor (not shown) is configured to receive images supplied by the camera 12 and to produce a wafer map of FOUP 5 based upon these images. Detecting the wafer presence through a window in the FOUP door is convenient because typically the door is completely flat, without any ribs or other features, and high quality images can be obtained. However, such a window may not be provided in a standard FOUP door. If a semiconductor wafer fabrication system uses FOUPs without a window in the door, another transparent part of the FOUP can be selected for the wafer detection, as is shown in FIG. 4.); and a controller configured to control the imaging device to image the substrate from a first height and image the substrate from a second height to acquire first imaging data and second imaging data (see 0013, 0035, 0038, 0041, 0043; According to yet another aspect of the invention, a system is provided for detecting a load condition of a plurality of wafer slots in a wafer transport module. The system comprises at least one radiation source. At least part of the wafer transport module is at least partially transparent to the radiation emitted from the at least one radiation source. The radiation source is positioned and aligned to direct the radiation emitted from it through the at least partially transparent part of the wafer transport module to an edge portion of a wafer upon retention of the wafer in one of the wafer slots. At least one image sensor is provided and aligned to detect radiation reflected from the edge portion of the wafer upon retention of the wafer in the slot. The at least one image sensor has a field of view covering at least one wafer slot and is configured to provide output signals representative of the edge portion of the wafer. The system also comprises a positioning/aligning mechanism to position/align the at least one image sensor relative to the wafer transport module, wherein the wafers are accommodated horizontally oriented and stacked in a vertically spaced apart relationship, and in a horizontal position so that an uppermost field of view covers a top wafer slot and a lowermost field of view covers a lowest wafer slot in the wafer transport module. A controller is in communication with the at least one image sensor and the positioning/aligning mechanism. The controller is configured to position and/or align the at least one image sensor to capture a plurality of images of a wafer, upon retention of the wafer in one of the wafer slots, from different angles relative to the wafer slot, so that each wafer slot is covered by at least two images. One of the at least two images provides a view of the wafer from a different angle relative to the wafer slot than a remainder of the at least two images. An image processor in communication with the at least one image sensor is adapted to process images from the at least one image sensor and to provide output data representing a loading status of each wafer slot. The image processor is also adapted to ignore information from parts of the images deteriorated by obstructions in the at least partially transparent part of the wafer transport module…… In one preferred embodiment, at least two images are taken of each wafer slot, but from different angles, e.g., from different vertical and/or horizontal positions. Multiple images of a wafer slot can be advantageous because the part of the cassette that is at least partly transparent might be inflicted with local obstructions or local highly reflective areas such as ribs in the cassette housing, labels, scratches or other features. Therefore, redundant information is preferably generated. At least two images, at different angles relative to a horizontal plane (e.g., the horizontal plane occupied by the wafer slot), are taken of each wafer slot so that if an obstruction renders one of the images, or an area of one of the images, useless, that image or that area of the image can be ignored and the other images can be used to analyze the wafer loading….. The dotted rectangle indicated in FIG. 3C is the field of view 10 of the camera 12. The radiation source 13, for example, an IR source, illuminates the edges of wafers 4 located in the field of view 10 at a light level sufficient to allow the camera 12 to capture a "processable" image. The camera 12 can capture a number of images at different vertical positions relative to FOUP 5. The images are preferably mutually overlapping and each image covers two or more wafers 4. The image processor (not shown) is configured to receive images supplied by the camera 12 and to produce a wafer map of FOUP 5 based upon these images. Detecting the wafer presence through a window in the FOUP door is convenient because typically the door is completely flat, without any ribs or other features, and high quality images can be obtained. However, such a window may not be provided in a standard FOUP door. If a semiconductor wafer fabrication system uses FOUPs without a window in the door, another transparent part of the FOUP can be selected for the wafer detection, as is shown in FIG. 4….. An advantage of an imaging system with a field of view that captures only part of the entire wafer stack is that the imaging system can be kept simple and compact, and can be disposed at a short distance from the FOUP. In principle, the field of view can be as small as to capture only one wafer. However, in order to circumvent problems from local obstructions or highly reflective parts in the transparent part of the FOUP, preferably at least two images of each wafer are captured, each image giving a slightly different view of the wafer. This can be achieved by providing two cameras, the cameras aligned at different angles with respect to the wafers. Alternatively, the field of view can be enlarged to cover more wafers within the field of view. By taking pictures with an enlarged field of view at every slot height, multiple pictures of one wafer slot at different angles are obtained with only one camera. Also, a combination of the two measures can be utilized. In a preferred embodiment of the invention, two cameras are provided to take images from different angles and the field of view for each image is dimensioned to capture more than one wafer. For example, the field of view for each image can be the same, e.g., 3, wafers. For a FOUP with 25 wafer slots 27 pictures are taken with each camera. The pictures are taken with the camera at different vertical positions relative to the FOUP, such that each wafer slot is covered by three images per camera and in total by 6 images. An alternative for a second camera can also be formed by one or more mirrors that split the field of view of a camera in two parts, each part viewing the wafers at a different angle relative to a horizontal plane of reference…… In imaging the wafers, one or more cameras are preferably moved vertically relative to a FOUP and preferably a plurality of images is taken with the camera(s) at different vertical positions relative to the FOUP. This movement can be performed in numerous ways, some of which are described below.), respectively, from the imaging device, and detect an accommodation state of the substrate based on the acquired first imaging data and the acquired second imaging data (see 0057, 0060, 0013; The flow chart shown in FIG. 8 illustrates the steps to produce a wafer map, utilizing the wafer-imaging system 11. In step 810, a closed wafer cassette such as a FOUP is positioned on a specified wafer mapping location, for example, a cassette load port of a processing tool (not shown). In step 820, a wafer imaging system takes images of the slots of the closed wafer cassette such as by vertically translating one or more cameras relative to the closed, partly transparent wafer cassette and by taking images at a plurality of vertical positions of the camera(s) relative to the cassette in such a way that at least two images from different angles are taken of each slot position. Preferably, at least two images are taken of each slot position. The images acquired are used for cassette recognition and corresponding wafer image filter selection, as well as for wafer slot status determination……. In step 870 the slot status is determined for the wafer slots of the cassette, based on the analysis of the results for all search areas 52 not filtered out by the wafer image filter. A wafer is determined to be correctly placed in a slot in the FOUP 5 if a predefined percentage, for example, about 90% or more, of the search areas 52 for a certain wafer are "positive." Alternatively, if only a predefined percentage, for example, about 10% or less, of the search areas 52 for a certain wafer are "positive", the wafer is determined to be absent. Other percentages may be chosen, depending on circumstances, such as about 80%/20%, or about 95%/5%. In step 880 a wafer map is constructed based upon the status of each wafer slot, as determined in step 870. In step 885 the FOUP is approved for further processing or rejected. Approval can be dependent on a match of the determined wafer map with an expected wafer map. In other systems, an expected wafer map might not be known and approval is only dependent on the absence of any cross-slotted or broken wafers. When the FOUP is approved for further processing, the FOUP can be opened and the wafers can be transferred into a processing tool, as indicated in step 890. When the FOUP is rejected, further processing is suspended, as indicated in step 895….. According to yet another aspect of the invention, a system is provided for detecting a load condition of a plurality of wafer slots in a wafer transport module. The system comprises at least one radiation source. At least part of the wafer transport module is at least partially transparent to the radiation emitted from the at least one radiation source. The radiation source is positioned and aligned to direct the radiation emitted from it through the at least partially transparent part of the wafer transport module to an edge portion of a wafer upon retention of the wafer in one of the wafer slots. At least one image sensor is provided and aligned to detect radiation reflected from the edge portion of the wafer upon retention of the wafer in the slot. The at least one image sensor has a field of view covering at least one wafer slot and is configured to provide output signals representative of the edge portion of the wafer. The system also comprises a positioning/aligning mechanism to position/align the at least one image sensor relative to the wafer transport module, wherein the wafers are accommodated horizontally oriented and stacked in a vertically spaced apart relationship, and in a horizontal position so that an uppermost field of view covers a top wafer slot and a lowermost field of view covers a lowest wafer slot in the wafer transport module. A controller is in communication with the at least one image sensor and the positioning/aligning mechanism. The controller is configured to position and/or align the at least one image sensor to capture a plurality of images of a wafer, upon retention of the wafer in one of the wafer slots, from different angles relative to the wafer slot, so that each wafer slot is covered by at least two images. One of the at least two images provides a view of the wafer from a different angle relative to the wafer slot than a remainder of the at least two images. An image processor in communication with the at least one image sensor is adapted to process images from the at least one image sensor and to provide output data representing a loading status of each wafer slot. The image processor is also adapted to ignore information from parts of the images deteriorated by obstructions in the at least partially transparent part of the wafer transport module.).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimedinvention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Garssen et al (US 2005/0035313 A1) in view of Weiss (US 2022/0130785 A1).
Regarding claim 5, Garssen teaches a substrate detection method of detecting an accommodation state of a substrate accommodated in a slot of a container (see 0012, 0030, 0034; According to another aspect of the invention, a method for evaluating a loading of a stack of wafers in wafer slots of a cassette is provided. The method comprises taking a plurality of images of the edge portions of the wafers using a digital camera. The images are taken through an at least partially transparent part of a closed cassette. The camera is moved relative to the cassette in the stack direction to take the plurality of images, such that at least one image of each wafer slot is taken and each image covers less than all of the wafer slots. The images are processed to detect the presence of a wafer edge and to provide output data to represent the loading status of each wafer slot….An imaging system with an image sensor is provided for gathering information on wafers in a cassette. Typically, the cassette is a closed structure such as a FOUP and at least a part of the cassette is at least partially transparent to radiation emitted from a radiation source. The source of radiation is preferably disposed outside the cassette and the radiation is preferably directed through the transparent part of the cassette, to an edge portion of the wafers inside the cassette. The sensor is aligned to detect radiation reflected or coming from the wafers through the transparent part of the cassette. Data from the sensor is processed to determine the loading status and orientation of the wafers in the cassette…. The source of radiation can direct a beam of radiation to the edge of the wafer and the reflection of the beam can be measured by a sensor. Preferably the sensor is an imaging sensor, such as a video camera, an X-ray camera or an acoustic camera configured to create an image of, or at least part of, the wafers stored inside a cassette. In addition, the imaging sensor is preferably a digital sensor, e.g., a digital camera, that outputs a digital image), comprising: imaging the substrate from a first height to acquire first imaging data (see 0035, 0012, 0060, 0057); imaging the substrate from a second height to acquire second imaging data (see 0035, 0012, 0060, 0057; In one preferred embodiment, at least two images are taken of each wafer slot, but from different angles, e.g., from different vertical and/or horizontal positions. Multiple images of a wafer slot can be advantageous because the part of the cassette that is at least partly transparent might be inflicted with local obstructions or local highly reflective areas such as ribs in the cassette housing, labels, scratches or other features. Therefore, redundant information is preferably generated. At least two images, at different angles relative to a horizontal plane (e.g., the horizontal plane occupied by the wafer slot), are taken of each wafer slot so that if an obstruction renders one of the images, or an area of one of the images, useless, that image or that area of the image can be ignored and the other images can be used to analyze the wafer loading…. The flow chart shown in FIG. 8 illustrates the steps to produce a wafer map, utilizing the wafer-imaging system 11. In step 810, a closed wafer cassette such as a FOUP is positioned on a specified wafer mapping location, for example, a cassette load port of a processing tool (not shown). In step 820, a wafer imaging system takes images of the slots of the closed wafer cassette such as by vertically translating one or more cameras relative to the closed, partly transparent wafer cassette and by taking images at a plurality of vertical positions of the camera(s) relative to the cassette in such a way that at least two images from different angles are taken of each slot position. Preferably, at least two images are taken of each slot position. The images acquired are used for cassette recognition and corresponding wafer image filter selection, as well as for wafer slot status determination…. In step 870 the slot status is determined for the wafer slots of the cassette, based on the analysis of the results for all search areas 52 not filtered out by the wafer image filter. A wafer is determined to be correctly placed in a slot in the FOUP 5 if a predefined percentage, for example, about 90% or more, of the search areas 52 for a certain wafer are "positive." Alternatively, if only a predefined percentage, for example, about 10% or less, of the search areas 52 for a certain wafer are "positive", the wafer is determined to be absent. Other percentages may be chosen, depending on circumstances, such as about 80%/20%, or about 95%/5%. In step 880 a wafer map is constructed based upon the status of each wafer slot, as determined in step 870. In step 885 the FOUP is approved for further processing or rejected. Approval can be dependent on a match of the determined wafer map with an expected wafer map. In other systems, an expected wafer map might not be known and approval is only dependent on the absence of any cross-slotted or broken wafers. When the FOUP is approved for further processing, the FOUP can be opened and the wafers can be transferred into a processing tool, as indicated in step 890. When the FOUP is rejected, further processing is suspended, as indicated in step 895). Garssen does not teach expressly detecting the number of substrates captured in the first imaging data and the second imaging data; and determining whether or not there is an abnormality in the number of substrates captured in the first imaging data and the second imaging data.
Weiss, in the same field of endeavor, teaches detecting the number of substrates captured in the first imaging data and the second imaging data (see 0009, 0015-0016; The system can be used to determine how many wafers are in the cassette, whether any wafers are missing and whether the wafers are properly disposed in their respective slots within the cassette. It can be determined whether any wafers are cross slotted such that they are not parallel stacked as they should be for proper removal and reinsertion into the cassette by a robot or other transfer tool. Image analysis and processing is employed to determine the center of each of the wafers. By determining the center of the wafers, a robot can grip the center of the wafers without need for a separate alignment step or alignment apparatus. One image scan provides a determination of all information on the X, Y and Z position of the wafers in relation to the camera reference position. The rotational position of the wafers about their respective centers is not determined but is not needed for system function…..Referring to FIGS. 1 and 2 there is shown in diagrammatic form a cutaway view of a wafer cassette 10 containing a stack of wafers 12 therein. Each of the wafers is disposed within a respective groove in the interior of the cassette and the wafers are spaced in a normally vertical stack as is well known in the industry. The wafers are of a known diameter. A camera 14 is disposed at an angle to the front opening of the cassette 10 in a position to view the edges of the entire stack of wafers 12. The camera can be a digital video camera providing digital signals representative of an image being seen. Alternatively the camera can be of analog type having a solid state optical sensor such as a CCD sensor, or an image tube such as a vidicon tube providing raster scan of an image. The camera is positioned at a known height Zref in relation to the plane on which the cassette is disposed. The line of sight LS of the camera is at an angle .theta. to that plane to provide a view of a portion of the edges of the full set of wafers within the cassette. The line of sight LS in the illustrated embodiment is about 20.degree. from the horizontal (X) reference surface. [0016] It should be understood that the cameras can be any type of image sensor or sensor apparatus capable of producing image data of the wafer edges being viewed. At least one frame of image data is captured by the camera for processing by an image processor to provide intended output data. The image data can be provided to the image processor directly from the camera or through intermediate storage buffers or other memory devices. If the camera provides analog output signals, the signals are converted in an analog-to-digital converter to digital form for processing by the image processor. A block diagram of a processing system is shown in FIG. 3. Image data from the camera or from a memory device is provided to an image processor 20 which is operative with a host computer 22 to derive from the received image data information representing intended outputs. The image processor and host computer may be part of a stand-alone, special-purpose image processing computer system. The image processor provides output data representing the position of each wafer within its respective slot location in the cassette, whether or not any wafers are missing, whether or not any wafers are cross-slotted or otherwise misaligned within the cassette, and the center of each of the wafers. All of this information can be provided from a single image scan of the wafers by the camera. The center of each of the wafers is computed from three points on the circumference of each wafer based upon known geometric principles. The techniques of image processing to provide positional information from a scanned image are, per se, known and are not described in detail herein.); and determining whether or not there is an abnormality in the number of substrates captured in the first imaging data and the second imaging data (see 0009, 0016; The system can be used to determine how many wafers are in the cassette, whether any wafers are missing and whether the wafers are properly disposed in their respective slots within the cassette. It can be determined whether any wafers are cross slotted such that they are not parallel stacked as they should be for proper removal and reinsertion into the cassette by a robot or other transfer tool. Image analysis and processing is employed to determine the center of each of the wafers. By determining the center of the wafers, a robot can grip the center of the wafers without need for a separate alignment step or alignment apparatus. One image scan provides a determination of all information on the X, Y and Z position of the wafers in relation to the camera reference position. The rotational position of the wafers about their respective centers is not determined but is not needed for system function…..It should be understood that the cameras can be any type of image sensor or sensor apparatus capable of producing image data of the wafer edges being viewed. At least one frame of image data is captured by the camera for processing by an image processor to provide intended output data. The image data can be provided to the image processor directly from the camera or through intermediate storage buffers or other memory devices. If the camera provides analog output signals, the signals are converted in an analog-to-digital converter to digital form for processing by the image processor. A block diagram of a processing system is shown in FIG. 3. Image data from the camera or from a memory device is provided to an image processor 20 which is operative with a host computer 22 to derive from the received image data information representing intended outputs. The image processor and host computer may be part of a stand-alone, special-purpose image processing computer system. The image processor provides output data representing the position of each wafer within its respective slot location in the cassette, whether or not any wafers are missing, whether or not any wafers are cross-slotted or otherwise misaligned within the cassette, and the center of each of the wafers. All of this information can be provided from a single image scan of the wafers by the camera. The center of each of the wafers is computed from three points on the circumference of each wafer based upon known geometric principles. The techniques of image processing to provide positional information from a scanned image are, per se, known and are not described in detail herein.).
It would have been obvious (before the effective filing date of the claimed invention) or (at the time the invention was made) to one of ordinary skill in the art to modify Garssen to utilize the cited limitations as suggested by Weiss. The suggestion/motivation for doing so would have been to have a simplified determination of whether wafers are properly disposed within their cassette slots (see 0004-0005, 0009). Furthermore, the prior art collectively includes each element claimed (though not all in the same reference), and one of ordinary skill in the art could have combined the elements in the manner explained above using known engineering design, interface and/or programming techniques, without changing a “fundamental” operating principle of Garssen, while the teaching of Weiss continues to perform the same function as originally taught prior to being combined, in order to produce the repeatable and predictable result. It is for at least the aforementioned reasons that the examiner has reached a conclusion of obviousness with respect to the claim in question.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Garssen et al (US 2005/0035313 A1) in view of Mollenkopf et al (US 2007/0118300 A1).
Regarding claim 2, Garssen teaches all elements as mentioned above in claim 1. Garssen does not teach expressly wherein the first imaging data is obtained by imaging at a position within an upper limit of a range of variation from an accommodation position of the substrate to be imaged in the container, and wherein the second imaging data is obtained by imaging at a position within a lower limit of the range of variation from the accommodation position of the substrate to be imaged in the container.
Mollenkopf, in the same field of endeavor, teaches wherein the first imaging data is obtained by imaging at a position within an upper limit of a range of variation from an accommodation position of the substrate to be imaged in the container, and wherein the second imaging data is obtained by imaging at a position within a lower limit of the range of variation from the accommodation position of the substrate to be imaged in the container (see 0041, 0059-0060).
It would have been obvious (before the effective filing date of the claimed invention) or (at the time the invention was made) to one of ordinary skill in the art to modify Garssen to utilize the cited limitations as suggested by Mollenkopf. The suggestion/motivation for doing so would have been to mitigate wafer damage and wafer mishandling due to cassette warping or deformation (see 0036). Furthermore, the prior art collectively includes each element claimed (though not all in the same reference), and one of ordinary skill in the art could have combined the elements in the manner explained above using known engineering design, interface and/or programming techniques, without changing a “fundamental” operating principle of Garssen, while the teaching of Mollenkopf continues to perform the same function as originally taught prior to being combined, in order to produce the repeatable and predictable result. It is for at least the aforementioned reasons that the examiner has reached a conclusion of obviousness with respect to the claim in question.
Claims 4, 8 is rejected under 35 U.S.C. 103 as being unpatentable over Garssen et al (US 2005/0035313 A1) in view of Bacchi et al (US 6,281,516 B1).
Regarding claim 4, Garssen teaches all elements as mentioned above in claim 1. Garssen does not teach expressly imaging by an imaging device integrally provided with a door, which moves vertically between a closing position where the door closes an opening of the container and an open position where the door opens the opening, and wherein an imaging position of the imaging device is calculated based on position information for the door, which is detected when the door moves vertically.
Bacchi, in the same field of endeavor, teaches imaging by an imaging device integrally provided with a door, which moves vertically between a closing position where the door closes an opening of the container and an open position where the door opens the opening, and wherein an imaging position of the imaging device is calculated based on position information for the door, which is detected when the door moves vertically (see col. 8, lines 15-35, col. 1, lines 50-67, col. 2, lines 40-67, col. 10, lines 30-57, col. 11, lines 1-20, col. 12, lines 1-40, col. 9, lines 50-67).
It would have been obvious (before the effective filing date of the claimed invention) or (at the time the invention was made) to one of ordinary skill in the art to modify Garssen to utilize the cited limitations as suggested by Bacchi,. The suggestion/motivation for doing so would have been to implement a continuous scan of the positioning of the substrate (see col. 9, lines 55-67). Furthermore, the prior art collectively includes each element claimed (though not all in the same reference), and one of ordinary skill in the art could have combined the elements in the manner explained above using known engineering design, interface and/or programming techniques, without changing a “fundamental” operating principle of Garssen, while the teaching of Bacchi, continues to perform the same function as originally taught prior to being combined, in order to produce the repeatable and predictable result. It is for at least the aforementioned reasons that the examiner has reached a conclusion of obviousness with respect to the claim in question.
Regarding claim 8, Garssen teaches all elements as mentioned above in claim 3. Garssen does not teach expressly imaging by an imaging device integrally provided with a door, which moves vertically between a closing position where the door closes an opening of the container and an open position where the door opens the opening, and wherein an imaging position of the imaging device is calculated based on position information for the door, which is detected when the door moves vertically.
Bacchi, in the same field of endeavor, teaches imaging by an imaging device integrally provided with a door, which moves vertically between a closing position where the door closes an opening of the container and an open position where the door opens the opening, and wherein an imaging position of the imaging device is calculated based on position information for the door, which is detected when the door moves vertically (see col. 8, lines 15-35, col. 1, lines 50-67, col. 2, lines 40-67, col. 10, lines 30-57, col. 11, lines 1-20, col. 12, lines 1-40, col. 9, lines 50-67).
It would have been obvious (before the effective filing date of the claimed invention) or (at the time the invention was made) to one of ordinary skill in the art to modify Garssen to utilize the cited limitations as suggested by Bacchi,. The suggestion/motivation for doing so would have been to implement a continuous scan of the positioning of the substrate (see col. 9, lines 55-67). Furthermore, the prior art collectively includes each element claimed (though not all in the same reference), and one of ordinary skill in the art could have combined the elements in the manner explained above using known engineering design, interface and/or programming techniques, without changing a “fundamental” operating principle of Garssen, while the teaching of Bacchi, continues to perform the same function as originally taught prior to being combined, in order to produce the repeatable and predictable result. It is for at least the aforementioned reasons that the examiner has reached a conclusion of obviousness with respect to the claim in question.
Allowable Subject Matter
Claim 7 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 7, none of the references of record alone or in combination suggest or fairly teach wherein the first imaging data and the second imaging data are obtained by imaging by an imaging device integrally provided with a door, which moves vertically between a closing position where the door closes an opening of the container and an open position where the door opens the opening, and wherein an imaging position of the imaging device is calculated based on position information for the door, which is detected when the door moves vertically.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EDWARD PARK. The examiner’s contact information is as follows:
Telephone: (571)270-1576 | Fax: 571.270.2576 | Edward.Park@uspto.gov
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/EDWARD PARK/Primary Examiner, Art Unit 2661
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