DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
1. The information disclosure statements (IDS) submitted on 9/19/2024 and 10/24/2025 and are in compliance with the provisions of 37 CFR 1.97. According, the information disclosure statement is being considered by the Examiner.
Examiner Notes
2. Examiner cites particular paragraphs, columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
4. Claims 1-11, 13-16, 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Pfeiffer et al. (US. Pat. 4417203; hereinafter “Pfeiffer”).
Regarding claim 1, Pfeiffer discloses a method of identifying defective electrical connections of a substrate (An electron beam test system for non-contact testing of three dimensional networks of conductors embedded in dielectric material (the advanced VLSI packaging substrates), specifically detection of open and short circuit conditions, see abstract), the substrate (a specimen or VLSI packaging substrate in Figs. 1 and 3-5) having a first surface contact (a top surface of the substrate, see Figs. 1 and 3-5) and a first electrical connection (one of a plurality of electrical connections, in Figs. 3-5, extending from end points 1-6 or electrical contact pad EC PADs) extending from the first surface contact, the method comprising:
placing the substrate (a specimen or VLSI packaging substrate in Figs. 1-3) on a stage in a vacuum chamber (a vacuum chamber 20 in Fig. 2); charging the first surface contact by directing an electron beam (electron beams 12, 42, 44) on the first surface contact (charging on surface contacts or end points 1-6 by directing an electron beam on the surface contacts 1-6. see Figs. 2-3 and Col. 6 lines 35 to Col. 7 line 9) and detecting secondary electrons emitted from the first surface contact during the charging for determining a secondary electron signal over time (a secondary electron emission is detected by detector 45 providing an output signal to processor 46. The output signal, converted to digital form or actual digital detection signal, is provided to the system controller 38 for purposes of defect detection. See Fig. 3 and Col. 6 lines 35 to Col. 7 line 9); and determining a state information about the first electrical connection depending on an occurrence of a drop or decline in the secondary electron signal (the secondary electron detecting signal from the electron detector 15 is evaluated by comparing the detected signal to normal expectation values. For example, in Fig. 3, the detected signal expected at point 3 or surface contact 3 is not present given the open circuit, the expected value “1” is not present. Fig. 3 shows a short connection between end points 4 and 5 that is detected when point 5 is scanned, the expected value “0” is not present.). Regarding claim 2, Pfeiffer discloses the method of claim 1, wherein the first electrical connection is identified as defective when a premature drop or decline in the secondary electron signal is detected (see Col. 4 line 40 to Col. 5 line 29, claim 5 and Fig. 3).
Regarding claim 3, Pfeiffer discloses the method of claim 1, wherein a discharge defect of the first electrical connection is identified in the event of a sudden drop in the secondary electron signal before reaching a predetermined charging time (tmax) or charging level (see Col. 4 line 40 to Col. 5 line 29, claim 5 and Fig. 3).
Regarding claim 4, Pfeiffer discloses the method of claim 1, wherein a leakage defect of the first electrical connection is identified in the event of a gradual decline in the secondary electron signal before reaching a predetermined charging time (t.sub.max) or charging level, and/or wherein a leakage defect of the first electrical connection is identified in the event of a decrease in the secondary electron signal that is stronger than a given threshold value when the charging is continued after a charging pause (see Col. 4 line 40 to Col. 5 line 29, claim 5 and Fig. 3).
Regarding claim 5, Pfeiffer discloses the method of claim 1, wherein the first electrical connection is identified as non-defective when the secondary electron signal continuously rises with a gradient in a predetermined range at least up to a predetermined charging time (tmax) or charging level (see Col. 6 line 58 to Col. 7 line 35, and Fig. 3).
Regarding claim 6, Pfeiffer discloses the method of claim 1, further comprising defining a predetermined charging time (tmax) or charging level, wherein the first electrical connection is identified as defective when a drop or decline in the secondary electron signal is detected before reaching the predetermined charging time or charging level (see Col. 6 line 58 to Col. 7 line 35, and Fig. 3).
Regarding claim 7, Pfeiffer discloses the method of claim 1, wherein the substrate has a plurality of surface contacts with a respective electrical connection extending therefrom, and the plurality of surface contacts are successively charged by directing the electron beam thereon for identifying state information about the respective electrical connection extending therefrom (see Figs. 1 and 45).
Regarding claim 8, Pfeiffer discloses the method of claim 7, wherein the plurality of surface contacts are distributed over a surface area of the substrate of at least 16 cm2, the method further comprising deflecting the electron beam with a scan deflector on the plurality of surface contacts for successively charging the plurality of surface contacts (see Fig. 2 and Figs. 4-5).
Regarding claim 9, Pfeiffer discloses the method of claim 1, wherein the substrate is a packaging substrate, particularly an advanced packaging substrate or a panel-level packaging substrate, and the first electrical connection is a device-to-device electrical interconnect path extending between two or more surface contacts and configured to connect devices or chips (see abstract and Fig. 1).
Regarding claim 10, Pfeiffer discloses the method of claim 1, wherein the electron beam is focused on the first surface contact for charging the first surface contact (see Figs. 2-5 and Col. 6 lines 35 to Col. 7 line 9).
Regarding claim 11, Pfeiffer discloses the 11. The method of claim 1, wherein the first surface contact has a diameter of 60 μm or less (VLSI package substrate in Fig. 1).
Regarding claim 13, Pfeiffer discloses an apparatus (a test system in Figs. 2-3) for identifying defective electrical connections of a substrate (An electron beam test system for non-contact testing of three dimensional networks of conductors embedded in dielectric material (such as the advanced VLSI packaging substrates), specifically detection of open and short circuit conditions), comprising: a vacuum chamber (a vacuum chamber 20 in Fig. 2) that houses a stage for placement of the substrate (the specimen 36 or VLSI packaging substrate is loaded on the table 32, see Figs. 2-3); an electron source (electron guns 12, 42, 44 ) configured to generate an electron beam (an electron beam as shown in Figs. 2-5); a scan deflector (a deflection generator 18 in Figs. 2-3) for directing the electron beam on a first surface contact for charging the first surface contact (charging on surface contacts or end points 1-6 by directing an electron beam on the surface contacts 1-6. see Figs. 2-3 and Col. 6 lines 35 to Col. 7 line 9 and Col. 7 line 45 to Col. 9 line 30); an electron detector (an electron detector 15) configured to detect secondary electrons emitted from the first surface contact during the charging to provide a secondary electron signal over time (a secondary electron emission is detected by detector 45 providing an output signal to processor 46. The output signal, converted to digital form or actual digital detection signal, is provided to the system controller 38 for purposes of defect detection. See Fig. 3 and Col. 6 lines 35 to Col. 7 line 9); and a data processing unit (a signal processor 46) with a memory storing instructions which, when executed (see at least in Col. 9 lines 25-38), cause the data processing unit to determine a state information about a first electrical connection connected to the first surface contact depending on an occurrence of a drop or decline in the secondary electron signal (charging on surface contacts or end points 1-6 by directing an electron beam on the surface contacts 1-6. see Figs. 2-3 and Col. 6 lines 35 to Col. 7 line 9 and Col. 7 line 45 to Col. 9 line 30).
Regarding claim 14, Pfeiffer discloses the apparatus of claim 13, wherein the data processing unit identifies the first electrical connection as defective when detecting a drop or decline in the secondary electron signal before reaching a predetermined charging time or charging level (see Col. 4 line 40 to Col. 5 line 29, claim 5 and Fig. 3).
Regarding claim 15, Pfeiffer discloses the apparatus of claim 13, wherein the scan deflector is configured to provide a deflection area of 16 cm2 or more (see Fig. 2 and Figs. 4-5).
Regarding claim 16, Pfeiffer discloses the apparatus of claim 13, further comprising a discharging device for discharging at least a portion of the substrate (see Fig. 2 and Figs. 4-5).
Regarding claim 18, Pfeiffer discloses the apparatus of claim 13, further comprising: a scan controller configured to sequentially direct the electron beam to a plurality of surface contacts for testing electrical connections extending from the plurality of surface contacts (see Col. 4 lines 45-55).
Regarding claim 19, Pfeiffer discloses the apparatus of claim 13 that is configured to perform a method of claim 1 (see Figs. 1-5, the summary.).
Regarding claim 20, Pfeiffer discloses a method of identifying defective electrical connections of a substrate (An electron beam test system for non-contact testing of three dimensional networks of conductors embedded in dielectric material (such as the advanced VLSI packaging substrates), specifically detection of open and short circuit conditions. See abstract), the substrate (1 in Figs. 1-5) having a first surface contact with a diameter of 35μm or less (the substrate 1 in Fig. 1 is a VLSI packaging substrate, surface contacts or end points are very small, see column 9 line 15) and a first electrical connection extending from the first surface contact connection (a plurality of electrical connections, in Figs. 3-5, extending from end points 1-6 or electrical contact pad EC PADs), the method comprising: placing the substrate (a specimen or VLSI packaging substrate in Figs. 1-3) on a stage in a vacuum chamber (a vacuum chamber 20 in Fig. 2); charging the first surface contact by directing an electron beam (electron beams 12, 42, 44) on the first surface contact (charging on surface contacts or end points 1-6 by directing an electron beam on the surface contacts 1-6. see Figs. 2-3 and Col. 6 lines 35 to Col. 7 line 9) and detecting secondary electrons emitted by the first surface contact during the charging for determining a secondary electron signal over time (a secondary electron emission is detected by detector 45 providing an output signal to processor 46. The output signal, converted to digital form or actual digital detection signal, is provided to the system controller 38 for purposes of defect detection. See Fig. 3 and Col. 6 lines 35 to Col. 7 line 9); and determining a state information about the first electrical connection based on a time dependency of the secondary electron signal (the secondary electron detecting signal from the electron detector 15 is evaluated by comparing the detected signal to normal expectation values. For example, in Fig. 3, the detected signal expected at point 3 or surface contact 3 is not present given the open circuit, the expected value “1” is not present. Fig. 3 shows a short connection between end points 4 and 5 that is detected when point 5 is scanned, the expected value “0” is not present.).
5. Claims 1-8, 10, 13-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Koshishiba et al. (JP-H10284552; hereinafter “Koshishiba”).
Regarding claim 1, Koshishiba discloses a method of identifying defective electrical connections of a substrate (An electron beam test system for detecting a disconnection and short circuit of a wiring pattern in a circuit substrate, see paragraph [0001]) having a first surface contact (such as surface contacts 3a-3f located on a top surface of the substrate 1, see Figs. 1-3) and a first electrical connection (such as electrical connections 2a-2c in Fig. 1) extending from the first surface contact (see Fig. 1), the method comprising:
placing the substrate (the circuit substrate 1) on a stage (a base 41 in Fig. 5 or a stage 55 in Fig. 12) in a vacuum chamber (a vacuum chamber 11 in Figs. 5, 11, 12); charging the first surface contact by directing an electron beam (such as electron beams 101a-101c in Fig. 5 or 101c in Fig. 11 or 101 in Fig. 12) on the first surface contact (“a circuit board which is positioned and placed on the deflecting system 24, the desired pad is irradiated with the calling electron beam 101a and the writing electron beams 101b and 101c…”, see page 9) and detecting secondary electrons emitted from the first surface contact during the charging for determining a secondary electron signal over time (“The potential measuring device according to the present invention irradiates an electron beam to a potential measuring point on a sample 54 to be inspected such as a circuit board, and generates secondary electrons 103 generated according to the potential at the potential measuring point on the sample 54 to be inspected. Is configured to measure a potential at a potential measuring point by a signal obtained by detecting the signal by the detector 33 via a spectroscope”, see page 15); and determining a state information about the first electrical connection depending on an occurrence of a drop or decline in the secondary electron signal (“By irradiating a charged particle beam of about 0 μA to detect secondary electrons generated from another desired portion, and examining a change in potential based on the conduction of the wiring pattern from a signal corresponding to the detected secondary electrons, a disconnection defect or a short circuit is detected”, see claim 12. Or “…. the secondary electrons generated from the pad are emitted. It is detected by the detector 33 The detected detection signal Ib is supplied to the signal processing circuit 37. The pad at one end (for example, 3b or 3f in FIG. 1) is applied to a negative potential, the number of detected secondary electrons increases. Therefore, CPU38 is a comparison between the signal I0 previously stored in the memory and the input Ib and when it is determined that Ib is larger than I0 by a certain allowable value, the wiring pattern 2a, 2b are determined to be conducted by the shorting defects 5a, when it is determined that the Ib and I0 is substantially the same determines that the wiring patterns 2c is disconnected by a disconnection defect 6a. Further, the CPU 38 compares the signal I0 stored in the memory with the input Ib and determines that the wiring pattern has no defect and is normal if the original design is as designed”, see pages 14-15.).
Regarding claim 2, Koshishiba discloses the method of claim 1, wherein the first electrical connection is identified as defective when a premature drop or decline in the secondary electron signal is detected (see claim 4).
Regarding claim 3, Koshishiba discloses the method of claim 1, wherein a discharge defect of the first electrical connection is identified in the event of a sudden drop in the secondary electron signal before reaching a predetermined charging time (tmax) or charging level (see pages 9, 14-15 and Fig. 10).
Regarding claim 4, Koshishiba discloses the method of claim 1, wherein a leakage defect of the first electrical connection is identified in the event of a gradual decline in the secondary electron signal before reaching a predetermined charging time (t.sub.max) or charging level, and/or wherein a leakage defect of the first electrical connection is identified in the event of a decrease in the secondary electron signal that is stronger than a given threshold value when the charging is continued after a charging pause (see pages 9, 14-15, claim 6 and Fig. 10).
Regarding claim 5, Koshishiba discloses the method of claim 1, wherein the first electrical connection is identified as non-defective when the secondary electron signal continuously rises with a gradient in a predetermined range at least up to a predetermined charging time (tmax) or charging level (see pages 9, 14-15, claim 6 and Fig. 10).
Regarding claim 6, Koshishiba discloses the method of claim 1, further comprising defining a predetermined charging time (tmax) or charging level, wherein the first electrical connection is identified as defective when a drop or decline in the secondary electron signal is detected before reaching the predetermined charging time or charging level (see pages 9, 14-15, claim 6 and Fig. 10).
Regarding claim 7, Koshishiba discloses the method of claim 1, wherein the substrate has a plurality of surface contacts with a respective electrical connection extending therefrom, and the plurality of surface contacts are successively charged by directing the electron beam thereon for identifying state information about the respective electrical connection extending therefrom (see Fig. 1).
Regarding claim 8, Koshishiba discloses the method of claim 7, wherein the plurality of surface contacts are distributed over a surface area of the substrate of at least 16 cm2, the method further comprising deflecting the electron beam with a scan deflector on the plurality of surface contacts for successively charging the plurality of surface contacts (see Fig. 1 and Fig. 5). Regarding claim 10, Koshishiba discloses the method of claim 1, wherein the electron beam is focused on the first surface contact for charging the first surface contact (see Figs. 5 and 11-12 and page 9).
Regarding claim 13, Koshishiba discloses an apparatus (An electron beam test system, in Figs. 5 and 11-12, for detecting a disconnection and short circuit of a wiring pattern in a circuit substrate, see paragraph [0001]) for identifying defective electrical connections of a substrate (a circuit substrate 1 in Figs. 1-3), comprising: a vacuum chamber (a vacuum chamber 11 in Figs. 5, 11, 12) that houses a stage (a base 41 in Fig. 5 or a stage 55 in Fig. 12) for placement of the substrate (see Figs. 5, 11-12); an electron source (an electron source 21 ) configured to generate an electron beam (such as electron beams 101a-101c in Fig. 5 or 101c in Fig. 11 or 101 in Fig. 12); a scan deflector (a deflection system 24 in Figs. 5 and 11-12) for directing the electron beam on a first surface contact for charging the first surface contact (“It comprises a mechanism (pulse gate) 22, an electron lens 23 for converging the electron beam 101, and a deflection system (deflection coil) 24 for deflecting the electron beam 101, and applies the electron beam 101 to a potential on a test sample 54 such as a circuit board”, see page 15); an electron detector (a secondary electron detector 13 or 33) configured to detect secondary electrons emitted from the first surface contact during the charging to provide a secondary electron signal over time (“The potential measuring device according to the present invention irradiates an electron beam to a potential measuring point on a sample 54 to be inspected such as a circuit board, and generates secondary electrons 103 generated according to the potential at the potential measuring point on the sample 54 to be inspected. Is configured to measure a potential at a potential measuring point by a signal obtained by detecting the signal by the detector 33 via a spectroscope”, see page 15); and a data processing unit (a signal processing circuit 37 in Fig. 5 and 11-12) with a memory storing instructions which, when executed (CPU 38), cause the data processing unit to determine a state information about a first electrical connection connected to the first surface contact depending on an occurrence of a drop or decline in the secondary electron signal ((“By irradiating a charged particle beam of about 0 μA to detect secondary electrons generated from another desired portion, and examining a change in potential based on the conduction of the wiring pattern from a signal corresponding to the detected secondary electrons, a disconnection defect or a short circuit is detected”, see claim 12. Or “…. the secondary electrons generated from the pad are emitted. It is detected by the detector 33 The detected detection signal Ib is supplied to the signal processing circuit 37. The pad at one end (for example, 3b or 3f in FIG. 1) is applied to a negative potential, the number of detected secondary electrons increases. Therefore, CPU38 is a comparison between the signal I0 previously stored in the memory and the input Ib and when it is determined that Ib is larger than I0 by a certain allowable value, the wiring pattern 2a, 2b are determined to be conducted by the shorting defects 5a, when it is determined that the Ib and I0 is substantially the same determines that the wiring patterns 2c is disconnected by a disconnection defect 6a. Further, the CPU 38 compares the signal I0 stored in the memory with the input Ib and determines that the wiring pattern has no defect and is normal if the original design is as designed”, see pages 14-15.).
Regarding claim 14, Koshishiba discloses the apparatus of claim 13, wherein the data processing unit identifies the first electrical connection as defective when detecting a drop or decline in the secondary electron signal before reaching a predetermined charging time or charging level (see pages 9, 14-15 and Fig. 10).
Claim Rejections - 35 USC § 103
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
7. Claims 12 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Pfeiffer in view of Golla-Schindler et al. (US. Pub. 2003/0230713; hereinafter “Golla-Schindler”).
Regarding claim 12, Pfeiffer discloses the method of claim 1, except for explicitly specifying that further comprising energy filtering the secondary electrons.
Golla-Schindler discloses a raster electron microscope (Fig.3) comprising energy filtering the secondary electrons (see [0040-41] and Fig. 3)
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the electron beam test system of Pfeiffer by having energy filtering the secondary electrons as taught by Golla-Schindler in order to meet the system design and specification requirement.
Regarding claim 17, Pfeiffer discloses the apparatus of claim 13, except for explicitly specifying that wherein the electron detector comprises: an Everhard-Thornley detector; and an energy filter for the secondary electrons in front of the Everhard-Thornley detector.
Golla-Schindler discloses a raster electron microscope (Fig.3) comprising the electron detector comprises: an Everhard-Thornley detector (see [0031]); and an energy filter for the secondary electrons in front of the Everhard-Thornley detector (see [0040-41] and Fig. 3).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the electron beam test system of Pfeiffer by having an Everhard-Thornley detector and an energy filter for the secondary electrons in front of the Everhard-Thornley detector as taught by Golla-Schindler in order to meet the system design and specification requirement.
Prior Art of Record
8. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Golladay (U.S Pub. 4943769) discloses an E-beam testing system uses the E-beam to test a sample with conductive elements (see specification for more details). Zingher (U.S Pub. 4578279) discloses an electron beam inspection system adapted to perform electrical inspection (see specification for more details).
Conclusion
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANG LE whose telephone number is (571)272-9349. The examiner can normally be reached on Monday thru Friday 7:30AM-5:00PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached on (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/THANG X LE/Primary Examiner, Art Unit 2858
7/8/2026
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