DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
2. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
3. Claims 8-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
4. Regarding claims 8-9:
Claim 7 recites “an upper surface of the wafer”. However, claims 8-9 also recite “an upper surface of the wafer”. It is unclear if “an upper surface of the wafer” recited in claims 8-9 refer to the same upper surface of the wafer in claim 7.
In addition, claim 8 recites that the first upper surface is configured to be substantially level with an upper surface of the wafer, which is inconsistent with the recitation in claim 7 that the first upper surface is configured to be not coplanar with an upper surface of the wafer, as it is unclear if “substantially level” includes coplanar relationship. For examination purposes, “substantially level” is interpreted to be not coplanar, but are at a level such that the ring can exert an effect on the wafer.
Claim Rejections - 35 USC § 103
5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
7. Claims 1-4, 7-8, 10-12, 16-20 are rejected under 35 U.S.C 103 as being unpatentable over Miya (US 20110095185) in view of Cui (US 20200161098).
8. Regarding claim 1:
Miya teaches a system for reducing e-field distortion near an outer portion of a wafer (abstract teaches a semiconductor inspecting apparatus) comprising:
a wafer holder comprising a holding portion configured to hold a wafer, the wafer having a first outer diameter ([0044] teaches a sample stage 11 that holds the sample 10. The wafer is not positively claimed as part of the invention and carries no patentable weight. [0051] teaches the circular sample 10);
a first conductive electrode configured to surround the wafer ([0051] teaches that the ring-shaped potential correcting electrode 44-1 is installed), the first conductive electrode having a second inner diameter and a third outer diameter, the second inner diameter being larger than the first outer diameter (by being positioned outside of a small sample as taught in [0071], the ring-shaped potential correcting electrode 44-1 possesses an inner diameter larger than the outer diameter of the wafer);
In one embodiment (fig. 8), Miya does not specifically note a second conductive electrode configured to encircle the first conductive electrode, the second conductive ring having a fourth inner diameter larger than the second inner diameter; a first, second, and third voltage supply, the first voltage supply being connected to the first conductive electrode, the second voltage supply being connected to the second conductive electrode, the third voltage supply being connected to the wafer; and a controller configured to control each of the first, second, and third voltage supplies to operate at a first, second, and third voltage respectively; wherein the first, second and third voltages are selected to reduce distortion of an e-field at the outer portion of the wafer, and the first, second and third voltages are different from each other.
However, in further embodiments and description, Miya teaches a second conductive electrode configured to encircle the first conductive electrode, the second conductive ring having a fourth inner diameter larger than the second inner diameter ([0099] teaches that the ring-shaped potential correcting electrode 44-1b is installed at the outside thereof of the potential correcting electrode 44-1a. Since electrode 44-1b is outside of 44-1a, it has an inner diameter larger than the second inner diameter);
a first, second, and third voltage supply, the first voltage supply being connected to the first conductive electrode, the second voltage supply being connected to the second conductive electrode, the third voltage supply being connected to the wafer ([0099] teaches that the potential correcting electrode 44-1a and the potential correcting electrode 44-1b are connected with the voltage variable DC power supply 48a and the voltage variable DC power supply 48b, as well as a retarding power supply 26 connected to the sample); and
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a controller configured to control each of the first and second voltage supplies to operate at a first and second voltage respectively ([0104] teaches controller 29 controls the DC supply 48a or the DC power supply 48b as the setting voltage thereof. [0114]); wherein the first and second voltages are selected to reduce distortion of an e-field at the outer portion of the wafer ([0103] teaches that the voltages are selected so that the bending of the primary electron beam 22 is removed), and
the first, second and third voltages are different from each other ([0099] teaches that the DC power supply 48b can have voltage different from that of the DC power supply 48a and that the DC power supply 48a and the DC power supply 48b are connected to the retarding power supply 26 in series, such that they are maintained at a potential lower than the sample 10).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya to include a second conductive electrode outside of the electrode 44-1 and include individual voltage supplies to the electrodes and sample. One of ordinary skill in the art would be motivated to make such modification such that the equipotential surface may be controlled to be dense (Miya [0099]) and then the bending of the primary electron beam 22 is removed, thereby preventing the position deviation (Miya [0103]).
Miya does not specifically note that the controller is configured to control the third voltage supply applied to the wafer.
Cui teaches using the measurement to determine an amplitude ratio and actively tunes the edge ring voltage control circuit 155, the substrate voltage control circuit 158 to achieve the target edge ring voltage ([0062]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya to include the control circuit that control the voltage supply applied to the wafer, as taught by Cui. One of ordinary skill in the art would be motivated to make such modification to allow for manipulating voltage applied to the ring and substrate based on the measured results (Cui [0048]) to further improve the process uniformity on the substrate (Cui [0006]).
9. Regarding claim 2:
The modified invention above teaches the system of claim 1, wherein the second voltage is higher than the first voltage (Miya [0099] teaches that the power supply 48b can be maintained at voltage higher than the first voltage).
10. Regarding claim 3:
The modified invention above teaches the system of claim 1, wherein the third voltage is higher than the first voltage (Miya [0099] teaches that the DC power supply 48a and the DC power supply 48b are connected to the retarding power supply 26 in series, such that they are maintained at a potential lower than the sample 10).
11. Regarding claim 4:
The modified invention above teaches the system of claim 1, wherein the first conductive electrode or the second conductive electrode has a fixed position (Miya [0051] teaches that potential correcting electrode 44-1 is installed within the groove 50. When the potential correcting electrode 44-1 is not moved, it has a fixed position).
12. Regarding claim 7:
The modified invention above teaches the system of claim 1, wherein the first conductive electrode comprises a first upper surface (Miya fig. 6(A) teaches the ring shaped potential correcting electrode 44-1 has an upper surface); the second conductive electrode comprises a second upper surface (fig. 12(A) teaches the electrode 44-1b. Even if the electrode is installed in the dielectric part 34 in the instant embodiment as taught in [0099], the electrode itself still has a second upper surface); and the first upper surface or the second upper surface is configured to be not coplanar with an upper surface of the wafer (fig. 6(A) teaches that the ring shaped potential correcting electrode 44-1 is placed in the groove 50 and is not coplanar with the upper surface of sample 10).
13. Regarding claim 8:
The modified invention above teaches the system of claim 7, wherein the first upper surface or the second upper surface is configured to be substantially level with, or higher than, an upper surface of the wafer (Miya fig. 6(A) teaches the ring shaped potential correcting electrode 44-1 has an upper surface at a level that can exert an effect on the wafer).
14. Regarding claim 10:
The modified invention above teaches the system of claim 1, wherein the first conductive electrode or the second conductive electrode is a conductive ring (Miya [0065] teaches ring-shaped potential correcting electrode 44-1).
15. Regarding claim 11:
The modified invention above teaches the system of claim 10, wherein the first conductive electrode or the second conductive electrode is a conductive coating on a non-conductive material (Miya [0065] teaches that the bottom surface of the groove 50 is coated with a conductive film, such that the ring-shaped potential correcting electrode 44-1 is formed. The groove is located in the dielectric part 34, which is non-conductive).
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16. Regarding claim 12:
The modified invention above teaches the system of claim 11, wherein the non-conductive material is portion of the wafer holder surrounding the holding portion (Miya [0065] teaches the groove is located in the dielectric part 34, which is portion of the sample stage 11 surround the holding portion that holds the substrate 10).
18. Regarding claim 16:
Miya teaches a system for reducing e-field distortion near an outer portion of a wafer (abstract teaches a semiconductor inspecting apparatus) comprising:
a wafer holder comprising a holding portion configured to hold a wafer, the wafer having a first outer diameter ([0044] teaches a sample stage 11 that holds the sample 10. The wafer is not positively claimed as part of the invention and carries no patentable weight. [0051] teaches the circular sample 10);
a first conductive electrode configured to surround the wafer ([0051] teaches that the ring-shaped potential correcting electrode 44-1 is installed), the first conductive electrode having a second inner diameter and a third outer diameter, the second inner diameter being larger than the first outer diameter (by being ring-shaped and positioned outside the sample 10 given a small sample as taught in [0071], the electrode possesses an inner diameter larger than the outer diameter of the wafer);
In one embodiment (fig. 8), Miya does not specifically note a second conductive electrode configured to encircle the first conductive electrode, the second conductive ring having a fourth inner diameter larger than the second inner diameter; and a first, second, and third voltage supply, the first voltage supply being connected to the first conductive electrode, the second voltage supply being connected to the second conductive electrode, the third voltage supply being connected to the wafer; and a controller configured to control each of the first, second, and third voltage supplies to operate at a first, second, and third voltage respectively; wherein the first, second and third voltages are selected to reduce distortion of an e-field at the outer portion of the wafer.
However, in further embodiments and description, Miya teaches a second conductive electrode configured to encircle the first conductive electrode, the second conductive ring having a fourth inner diameter larger than the second inner diameter ([0099] teaches that the ring-shaped potential correcting electrode 44-1b is installed at the outside thereof of the potential correcting electrode 44-1a. Since electrode 44-1b is outside of 44-1a, it has an inner diameter larger than the second inner diameter);
a first, second, and third voltage supply, the first voltage supply being connected to the first conductive electrode, the second voltage supply being connected to the second conductive electrode, the third voltage supply being connected to the wafer ([0099] teaches that the potential correcting electrode 44-1a and the potential correcting electrode 44-1b are connected with the voltage variable DC power supply 48a and the voltage variable DC power supply 48b, as well as a retarding power supply 26 connected to the sample); and
a controller configured to control each of the first and second voltage supplies to operate at a first and second voltage respectively ([0104] teaches controller 29 controls the DC supply 48a or the DC power supply 48b as the setting voltage thereof. [0114]); wherein the first and second voltages are selected to reduce distortion of an e-field at the outer portion of the wafer ([0103] teaches that the voltages are selected so that the bending of the primary electron beam 22 is removed).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya to include a second conductive electrode outside of the electrode 44-1 and include individual voltage supplies to the electrodes and sample. One of ordinary skill in the art would be motivated to make such modification such that the equipotential surface may be controlled to be dense (Miya [0099]) and then the bending of the primary electron beam 22 is removed, thereby preventing the position deviation (Miya [0103]).
Miya does not specifically teach that the controller is configured to control the third voltage supply applied to the wafer.
Cui teaches using the measurement to determine an amplitude ratio and actively tunes the edge ring voltage control circuit 155, the substrate voltage control circuit 158 to achieve the target edge ring voltage ([0062]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya to include the control circuit that control the voltage supply applied to the wafer, as taught by Cui. One of ordinary skill in the art would be motivated to make such modification to allow for manipulating voltage applied to the ring and substrate based on the measured results (Cui [0048]) to further improve the process uniformity on the substrate (Cui [0006]).
19. Regarding claim 17:
The above modified invention teaches the system of claim 16, wherein the controller is configured to control each of the first, second, and third voltage supplies so that the each of the first, second, and third voltages are different from each other (Miya [0099] teaches that the DC power supply 48b can have voltage different from that of the DC power supply 48a and that the DC power supply 48a and the DC power supply 48b are connected to the retarding power supply 26 in series, such that they are maintained at a potential lower than the sample 10).
20. Regarding claim 18:
The above modified invention teaches the system of claim 16, wherein the second voltage is lower than the first voltage (Miya [0099] teaches that the power supply 48b can be maintained at voltage lower than the DC power supply 48a).
21. Regarding claim 19:
The above modified invention teaches the system of claim 16, wherein the second voltage is higher than the first voltage (Miya [0099] teaches that the power supply 48b can be maintained at voltage higher than the DC power supply 48a).
22. Regarding claim 20:
The above modified invention teaches the system of claim 16, wherein the third voltage is higher than the first voltage (Miya [0099] teaches that the DC power supply 48a and the DC power supply 48b are connected to the retarding power supply 26 in series, such that they are maintained at a potential lower than the sample 10).
23. Claims 5-6, 9 are rejected under 35 U.S.C 103 as being unpatentable over Miya in view of Cui, further in view of McChesney (US 20160211165)
24. Regarding claim 5:
The modified invention above teaches the system of claim 1. Miya in view of Cui fails to teach that wherein the first conductive electrode or the second conductive electrode is moveable in a first direction.
McChesney teaches actuator moving one or more portions of the edge coupling ring to alter the position of the one or more portions of the edge coupling ring in vertical direction ([0041]-[0042]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya to incorporate the actuator to the ring-shaped electrode in Miya and include moving one or more portions of the coupling ring in vertical direction as taught by McChesney. One of ordinary skill in the art would be motivated to make such modification to adjust the relative height between the ring and the substrate to ensure etch uniformity (McChesney [0041]-[0042]).
25. Regarding claim 6:
The modified invention above teaches the system of claim 5. Miya in view of Cui fails to teach that wherein the first direction is a radial direction or a height direction.
McChesney teaches actuator moving one or more portions of the edge coupling ring to alter the position of the one or more portions of the edge coupling ring in vertical direction ([0041]-[0042]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya to incorporate the actuator to the ring-shaped electrode in Miya and include moving one or more portions of the coupling ring in vertical direction as taught by McChesney. One of ordinary skill in the art would be motivated to make such modification to adjust the relative height between the ring and the substrate to ensure etch uniformity (McChesney [0041]-[0042]).
26. Regarding claim 9:
The modified invention above teaches the system of claim 7, further comprising a first height difference between the first upper surface and an upper surface of the wafer (Miya fig. 6(A) teaches that the ring shaped potential correcting electrode 44-1 is placed in the groove 50 and is not coplanar with the upper surface of sample 10. There is a height difference between the upper surface of 44-1 and an upper surface of the sample 10).
27. Claims 13, 15 are rejected under 35 U.S.C 103 as being unpatentable over Miya in view of Cui, further in view of Ando (US 20210142978).
28. Regarding claim 13:
The modified invention above teaches the system of claim 1. Miya in view of Cui does not teach that wherein the first conductive electrode or the second conductive electrode is divided into segments comprising a first segment and a second segment.
Ando teaches that an electrode ring having multiple segments ([0042] fig. 7 teaches a plurality of electrodes 230 are arranged to surround the circumference of the substrate 101).
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It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have divided Miya’s ring-shaped potential correcting electrode 44-1 into multiple segments as taught by Ando. One of ordinary skill in the art would be motivated to make such modification so that the offset potential at different positions can be variably controlled to correct the beam shift (Ando [0045]).
17. Regarding claim 15:
Miya teaches loading a wafer onto a wafer holder comprising a holding portion, the wafer having a first outer diameter ([0044] teaches a sample stage 11 that holds the sample 10. [0051] teaches the circular sample 10);
applying a first voltage to a first conductive electrode encircling the holding portion ([0051] teaches that the ring-shaped potential correcting electrode 44-1 is installed. The potential correcting electrode 44-1 is connected with the voltage variable DC power supply 48), the first conductive electrode having a second inner diameter and a third outer diameter, the second inner diameter being larger than the first outer diameter (by being positioned outside of a small sample as taught in [0071], the ring-shaped potential correcting electrode 44-1 possesses an inner diameter larger than the outer diameter of the wafer);
In one embodiment (fig. 8), Miya does not specifically note applying a second voltage to a second conductive electrode encircling the first conductive electrode, the second conductive electrode having a fourth inner diameter larger than the second inner diameter; and applying a third voltage to the wafer, and the first, second and third voltages are different from each other.
However, in further embodiments and description, Miya teaches applying a second voltage to a second conductive electrode encircling the first conductive electrode, the second conductive electrode having a fourth inner diameter larger than the second inner diameter ([0099] teaches that the ring-shaped potential correcting electrode 44-1b is installed at the outside thereof of the potential correcting electrode 44-1a. Since electrode 44-1b is outside of 44-1a, it has an inner diameter larger than the second inner diameter); and applying a third voltage to the wafer ([0099] teaches that the potential correcting electrode 44-1a and the potential correcting electrode 44-1b are connected with the voltage variable DC power supply 48a and the voltage variable DC power supply 48b, as well as a retarding power supply 26 connected to the sample), wherein the first and second voltages are selected to reduce distortion of an e-field at the outer portion of the wafer ([0103] teaches that the voltages are selected so that the bending of the primary electron beam 22 is removed)
and the first, second and third voltages are different from each other ([0099] teaches that the DC power supply 48b can have voltage different from that of the DC power supply 48a and that the DC power supply 48a and the DC power supply 48b are connected to the retarding power supply 26 in series, such that they are maintained at a potential lower than the sample 10).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya to include a second conductive electrode outside of the electrode 44-1 and include individual voltage supplies to the electrodes and sample. One of ordinary skill in the art would be motivated to make such modification such that the equipotential surface may be controlled to be dense (Miya [0099]) and then the bending of the primary electron beam 22 is removed, thereby preventing the position deviation (Miya [0103]).
Miya does not specifically note that wherein the third voltages is selected to reduce distortion of an e-field at the outer portion of the wafer.
Cui teaches using the measurement to determine an amplitude ratio and actively tunes the edge ring voltage control circuit 155, the substrate voltage control circuit 158 to achieve the target edge ring voltage ([0062]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya to include the control circuit that control and select the voltage supply applied to the wafer, as taught by Cui. One of ordinary skill in the art would be motivated to make such modification to allow for manipulating voltage applied to the ring and substrate based on the measured results (Cui [0048]) to further improve the process uniformity on the substrate (Cui [0006]).
Miya in view of Cui does not specify a non-transitory computer-readable medium storing a set of instructions that are executable by at least one processor of a device to cause the device to perform a method.
However, Ando teaches a non-transitory computer-readable medium storing a set of instructions that are executable by at least one processor ([0078] teaches a program for causing a processor to execute processing) of a device to cause the device to perform a method ([0066] teaches a computer).
Both Ando and Miya are directed towards adjusting potential applied to potential correcting electrode in the context of electron beam inspecting apparatus (Ando abstract, Miya abstract). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have performed the method as taught by Miya in view of Cui using the non-transitory computer-readable medium storing a set of instructions that are executable by at least one processor, as taught by Ando. Carrying out a method with a non-transitory computer-readable medium yields predictable results to one of ordinary skill in the art.
29. Claim 14 is rejected under 35 U.S.C 103 as being unpatentable over Miya in view of Cui, further in view of Ando, further in view of McChesney.
30. Regarding claim 14:
The modified invention above teaches the system of claim 13. Miya in view of Cui, further in view of Ando does not teach that wherein the first segment is moveable with respect to the second segment.
McChesney teaches actuator moving one or more portions of the edge coupling ring to alter the position of the one or more portions of the edge coupling ring and correcting horizontal offsets by moving the ring side-to-side ([0041]-[0042]). Moving one portion while not moving other portions suggests that one portion is movable with respect to other portions.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Miya in view of Cui, further in view of Ando by incorporating the actuator to the various segments and include moving one or more portions of the coupling ring as taught by McChesney. One of ordinary skill in the art would be motivated to make such modification so that the horizontal offset may be corrected and that horizontal movement may be performed to center the edge coupling effect relative to the substrate (McChesney [0042]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LARRY LI whose telephone number is (571) 272-5043. The examiner can normally be reached 8:30am-4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Robert Kim can be reached at (571) 272-2293. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LARRY LI/
Examiner, Art Unit 2881
/WYATT A STOFFA/Primary Examiner, Art Unit 2881
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