DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-12, in the reply filed on 8/25/2026 is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1,5 and 7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JP 2017-188549 A (herein after JP-549; provided with the IDS).
Regarding claim 1, JP-549 discloses a substrate processing method for processing a wafer W (corresponding to the "substrate"), the method including grinding a back surface (corresponding to the "one surface") of the wafer W to form a back surface recessed section (corresponding to the "recess portion") in which the central section (corresponding to the "center") of the back surface is more recessed than an outer peripheral edge section (corresponding to the "outer peripheral portion");
measuring the thickness of the wafer W after grinding to acquire the thickness distribution of the wafer W, and in accordance with the surface shape distribution of the back surface of the wafer W, supplying an etching solution to the back surface of the post-grinding wafer W from an etching solution supply nozzle 18 to etch the back surface of the wafer W (see, [0028]-[0037]; Figures 1-3,6,7).
JP-549 also discloses that it is more favorable to measure, in advance, the surface shape distribution of the back surface of the gull-shaped wafer W that has been subjected to back-surface grinding prior to etching, and, in accordance with the surface shape distribution, controlling at least the swing width of the etching solution supply nozzle 18 (see, [0033]).
Therefore, the step for etching the back surface of the wafer W in accordance with the surface shape distribution of the back surface of the wafer W is found to be a step for calculating, on the basis of the thickness distribution, optimal etching conditions for optimizing the etching amount deviation distribution during the etching of the back surface of the wafer W, and etching the back surface of the wafer W on the basis of said optimal etching conditions.
Regarding claim 5, JP-549 discloses that the back surface recessed section and a flat section that is provided in an annular shape around the back surface recessed section (corresponds to the ring shape) is formed in the back surface of the post-grinding wafer W, and the space (corresponding to the "diameter of the recess portion") between thick banking sections 104 is at or below the scan width during the reciprocating motion of the etching solution supply nozzle 18 in the diameter direction passing through the center section of the back surface of the wafer W (see, [0030] and fig. 2, 6, and 7).
Regarding claim 7, JP-549 discloses disclose that controlling the swing width (corresponding to the "scan width during the reciprocating motion of the etching solution supply unit") of the etching solution supply nozzle 18 in accordance with the surface shape distribution, or controlling the swing speed (corresponding to the "scan speed during the reciprocating motion of the etching solution supply unit") of the etching solution supply nozzle 18 ([0032]-[0034]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 6,9-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over JP 2017-188549 A (herein after JP-549) as applied to claim 1,5 above, and further in view of Hajime et al (US 5,821,166).
Regarding claim 6, JP-549 discloses above for the claims 1 and 5 but fails to teach grinding the first surface flat; and further grinding a vicinity of the center of the first surface ground flat to form the recess portion.
However, Hajime et al disclose that a wafer is subjected to lapping corresponding to the "flat grinding"), and then recessed sections are formed in said wafer (col. 2, lines 34-39, and fig. 1a-1b).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ Hajime et al's teaching of grinding first flat and further grinding to form the recess into the teaching of JP-549 for effectively forming the recess portion as suggested by Hajime et al.
Regarding claims 9 and 11, JP-549 discloses above for the claim 1 but fails to disclose a second surface is ground before the first surface is etched.
However, Hajime et al disclose that prior to etching both surfaces, grinding is performed on both surfaces of the wafer to form recessed sections in both surfaces of the wafer (Fig. 1a-1d).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to employ Hajime et al's teaching of prior to etching both surfaces, grinding is performed on both surfaces of the wafer to form recessed sections in both surfaces of the wafer into the teaching of JP-549 for effectively forming the recess as suggested by Hajime et al.
Regarding claim 10, JP-549 indicates that the thickness distribution of the wafer W prior to the execution of the etching is measured, and etching conditions for the wafer W are determined on the basis of said measurement (paragraphs [0032] and [0033]).
Allowable Subject Matter
Claims 2-4, 8 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to teach or renders obvious to a process, including the step of forming the recess, wherein "the height of the recess portion is equal or below the difference between the maximum value and the minimum value of the controllable etching amount deviation distribution during the etching of the first surface" as the context of claim 2.
Claims 3-4 depend on the claim 2 and therefore, also allowable.
The prior art fails to teach or renders obvious to a process, including the step of optimizing of the etching amount deviation distribution comprises: acquiring etching amount deviation distributions of the first surface when etching the first surface under multiple different etching conditions and optimizing, such that the first surface has a target shape by superposing the etching amount deviation distributions corresponding to the multiple etching conditions, a combination of the etching amount deviation distributions used in superposition and a superposing number of the etching amount deviation distributions by using an optimization method as the context of claim 8.
The prior art fails to teach or renders obvious to a process, including the step of the grinding of the second surface and the grinding of the first surface are performed on multiple substrates consecutively, and etching of the second surface is performed under a same etching condition on the multiple substrates as the context of claim 12.
Conclusion
The prior art made of record, listed in the PTO-892 and not relied upon is considered pertinent to applicant's disclosure. Liu et al (US 2010/0062611) disclose following a bonding process, grinding process and spin etching process with HNA; wherein, measuring a thickness of the substrate at various positions across the substrate and the substrate may include a peak profile 708 (similar to the one 606 in FIG. 6) at a region substantially at the center 706 of the substrate ([0036], Figures 6).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAMIM AHMED whose telephone number is (571)272-1457. The examiner can normally be reached M-TH (8-5:30pm).
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SHAMIM AHMED
Primary Examiner
Art Unit 1713
/SHAMIM AHMED/ Primary Examiner, Art Unit 1713
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