DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1 and 3 to 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (2005/0277260).
The Cohen et al reference teaches a method of growing a silicon containing layer over a substrate, note, entire reference. A substrate is placed in a chamber on a support. The chamber is a CVD chamber, note para 0052. The substrate is silicon and can have different orientation regions. The regions can be of the (110) and a (100) or non (110, note para 0039. The layer containing silicon is deposited on to the substrate by lateral overgrowth means, note, para 0039 and 0048. The growth starts at one orientation such as the (100). The sole difference between the instant claim and the prior art is the (100) region being between two (110) regions. However, it would have been obvious to one of ordinary skill in the art before the filing date of the instant invention, to determine through routine experimentation the optimum, operable placement of the regions in the Cohen et al reference in order to grow the silicon layer onto of the substrate with the desired orientations and interfaces.
With regards to claim 3, the Cohen et al reference teaches the deposited silicon to be homogenous to the substrate, note para 0039.
With regards to claim 4, the Cohen et al reference teaches that the (111) orientation can also be used, note, para 0039.
With regards to claim 5, the Cohen et al reference teaches the grown silicon layer over the entire substrate to be conformal, note, figures 4 and 5.
With regards to claim 6, the Cohen et al reference teaches the regions to be monocrystalline silicon ,note para 0039.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (2005/0277260).
The Cohen et al reference is relied on for the same reasons as stated, supra, and differs from the instant claim in the amount of the regions to each other. However, it would have been obvious to one of ordinary skill in the art before the filing date of the instant invention, to determine through routine experimentation the optimum, operable ratio of the regions to each other in the Cohen et al reference in order to create the desired device.
Claim(s) 7 to 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (2005/0277260) in view of Lo et al (10,797,135).
The Cohen et al reference is relied on for the same reasons as stated, supra, and differs from the instant claims in the substrate having a region of dielectric material. However, the Lo et al reference teaches a silicon substrate with dielectric regions which then have a layer of silicon deposited thereon, note col 4, lines 1-20. It would have been obvious to one of ordinary skill in the art before the filing date of the instant invention, to modify the Cohen et al process by the teachings of the Lo et al reference to have dielectric regions in the substrate in order to have the desired electrical contacts with the grown layers.
With regards to claim 8, the Lo et al reference teaches the dielectric can be silicon oxide, note col 4, lines 1-20.
With regards to claim 9, the Lo et al reference teaches the dielectric can be a nitride, note col 4, lines 1-20.
Claim(s) 10 to 13, 15 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (2005/0277260) in view of Lo et al (10,797,135).
The Cohen et al reference is relied on for the same reasons as stated, supra, and differs from the instant claims in the deposited silicon being doped. However, the Lo et al reference further teaches a silicon deposition with a dopant added, note col 4, lines 30-45. It would have been obvious to one of ordinary skill in the art before the filing date of the instant invention, to modify the Cohen et al process by the teachings of the Lo et al reference to deposit a doped silicon layer in order to have the layer with the needed properties by the addition of a dopant.
With regards to claim 11, the Lo et al reference teaches flowing silicon precursor gas, dopant gas and at pressures less than 300 torr into a chamber to deposit the doped silicon layer, note col 4, lines 35-45.
With regards to claim 12, the Lo et al reference teaches the silicon precursor gas to be dichlorosilane, note, col 4, line 65 to col 5, line 5.
With regards to claim 13, the Lo et al reference teaches the deposited doped silicon layer to have a thickness less than 10nm, note col 5 lines 52-59.
With regards to claim 15, the Lo et al reference teaches flowing silicon precursor gas, dopant gas where the dopant gas is phosphine and arsine, note col 5, lines 35-55.
With regards to claim 16, the Lo et al reference teaches coflowing silicon precursor gas, dopant gases, note col 5, lines 35-45.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (2005/0277260) in view of Lo et al.(10,797,135).
The Cohen et al and Lo et al references are relied on for the same reasons as stated, supra, and differs from the instant claim in the dopant gas. However, it would have been obvious to one of ordinary skill in the art before the filing date of the instant invention, to determine through routine experimentation the optimum, operable boron source gas in the combined references in order to have a uniform and desired amount of boron in the silicon layer.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (2005/0277260) in view of Lo et al.(10,797,135).
The Cohen et al and Lo et al references are relied on for the same reasons as stated, supra, and differs from the instant claim in the use of arsine without phosphine. However, it would have been obvious to one of ordinary skill in the art before the filing date of the instant invention, to determine through routine experimentation the optimum, operable dopant and dopant gas in the combined references in order to have a desired characteristic in the grown layer.
Claim(s) 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (2005/0277260) in view of Lo et al.(10,797,135).
The Cohen et al and Lo et al references are relied on for the same reasons as stated, supra, and differs from the instant claim in the specific apparatus. However, the Acosta et al reference teaches a vapor deposition system. The system consists of a reactor with gas feed lines, note fig 1. There is a controller to operate the system and the gas flows, note para 0057. The gases flowed can be silicon, dopants and HCl an etchant, note para 0035-0044. The controller has a memory to run the system at set levels, note para 0048. It would have been obvious to one of ordinary skill in the art before the filing date of the instant invention, to modify the Cohen et al references by the teachings of Acosta et al reference to use a system with controllers in order to have a uniform silicon layer. Noting, the process parameters are not considered apparatus limitations.
Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The prior art does not teach nor render obvious the instantly claimed invention. The combined references do not teach the HCl addition and ratio with the deposition gases.
Examiner’s Remarks
The remaining references are merely cited of interest as showing the state of the art in silicon deposition.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT M KUNEMUND whose telephone number is (571)272-1464. The examiner can normally be reached M-F 8:00 am to 4:30 pm.
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RMK
/ROBERT M KUNEMUND/ Primary Examiner, Art Unit 1714
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