DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Abstract
The abstract of the disclosure is objected to because:
The Abstract does not contain “a method of making…” please, revise.
Please, change “a semiconductor device has” to - -A semiconductor device and a method of making a semiconductor device each includes - -.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-2 of the instant application (18/902,287) provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of co-pending Application No. 17/452,855 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because:
Regarding claims 1-2 of the instant application 18/902,287, claim 1 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claims 1-2 of the instant application 18/902,287.
The term EMC (epoxy molding compound) bump is equivalent or the same of polymer bump.
Regarding claim 5 of the instant application 18/902,287, claim 2 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claim 6 of the instant application 18/902,287.
Regarding claim 6 of the instant application 18/902,287, claim 6 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claim 6 of the instant application 18/902,287.
Regarding claims 7-8, and 13 of an instant application 18/902,287, claim 1 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claims 7-8, and 13 of the instant application 18/902,287.
Regarding claim 11 of the instant application 18/902,287, claim 2 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claim 6 of the instant application 18/902,287.
Regarding claim 12 of the instant application 18/902,287, claim 6 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claim 6 of the instant application 18/902,287.
Regarding claims 7-8, and 13 of an instant application 18/902,287, claim 7 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claims 7-8, and 13 of the instant application 18/902,287.
Regarding claim 12 of the instant application 18/902,287, claim 11 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claim 12 of the instant application 18/902,287.
Regarding claims 14-15 of the instant application 18/902,287, claim 14 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claims 14-15 of the instant application 18/902,287.
Regarding claims 20-21, and 25 of the instant application 18/902,287, claim 14 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claims 20-21, and 25 of the instant application 18/902,287.
Regarding claims 20-21, and 25 of the instant application 18/902,287, claims 20-21 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claims 20-21, and 25 of the instant application 18/902,287.
Regarding claims 22-23 of the instant application 18/902,287, claim s 22-23 of the co-pending of the application 17/452,855 comprising all the limitations that encompass all the limitations of claims 22-23 of the instant application 18/902,287.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (U.S. 2020/0161252) in view of Kapusta (U.S. Patent 10,163,773).
Regarding claim 1 and 14, Yang discloses a semiconductor device and its making method as shown in figures 3a-3d comprising:
providing an antenna PCB (150) including an antenna (190) formed as part of a conductive layer of the antenna PCB;
disposing a semiconductor package (210) over the antenna PCB (150), wherein the semiconductor package includes a shielding layer (180) formed over the semiconductor package; and
forming a [[polymer]] conductive bump (182) on the antenna PCB directly over the antenna.
Yang does not specifically disclose the bump is made from polymer and is electrical insulating.
Kapusta teaches electronic packages (10) comprising a polymer bump (62)
is electrical insulating (column 10, line 15+).
It would have been obvious to one having ordinary skill in the art before the
effective filling date to have a teaching of Kapusta employed in the device of Wang in
order to provide excellent mechanical and thermal bonding structure.
As to claims 7, 13 and 20, 25, Yang discloses a semiconductor device and its making method, as shown in figures 3a-3d comprising:
providing a PCB (150) including an antenna (190);
disposing a semiconductor package (210) over the PCB; and
forming a [[polymer]] conductive bump (182) on the PCB (150) over the antenna.
Yang does not specifically disclose the bump is made from polymer and is electrical insulating.
Kapusta teaches electronic packages (10) comprising a polymer bump (62)
is electrical insulating (column 10, line 15+).
It would have been obvious to one having ordinary skill in the art before the
effective filling date to have a teaching of Kapusta employed in the device of Wang in
order to provide excellent mechanical and thermal bonding structure.
Regarding claims 2, 8, 15, and 21, Yang as modified by Kapusta further including forming a shielding layer (180) over the antenna PCB (150).
Regarding claims 3, 9, 16, 22, Yang as modified by Kapusta discloses the semiconductor package (210) includes a double-sided system-in-package (SiP) module.
Regarding claims 4, 10, 17, and 23, Yang as modified by Kapusta teaches the polymer bump (62) includes a high dielectric constant (column 10, lines 15-23).
Regarding claims 5, 11, and 18, Yang as modified by Kapusta teaches the polymer bump (62) is molded onto the PCB (20, 58).
Regarding claims 6, 12, 19, and 24, Yang as modified by Kapusta discloses a conductive bump (216) between the semiconductor package (210) and antenna PCB (150).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN T DINH whose telephone number is (571)272-1929. The examiner can normally be reached 8am-5pm, M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TUAN T DINH/ Primary Examiner, Art Unit 2847
Prosecution Insights