DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of claims 9-13 and 15-20 in the reply filed on 1/1/2025 is acknowledged. The traversal is on the ground(s) that examiner has not established the burden. This is not found persuasive because the burden is established by the showing of “distinct” in section 3 (page 3) and section 4 of the restriction requirement of 10/16/2025 details why there is a burden.
The requirement is still deemed proper and is therefore made FINAL
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 9-13 and 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Schwab (US 2008/0224291), hereinafter Schwab.
Regarding claim 9, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) teaches a method of forming semiconductor device, the method comprising:
coupling a die support structure (106 and 117 of Figure 2C; para 21; or alternatively, 107 described in last sentence of para 21) over one of a first largest planar (124, para 20) surface or a second largest planar surface (126, para 20) of two or more semiconductor die (102, para 22); and
singulating (para 22) the two or more semiconductor die from a wafer to form a semiconductor device..
Schwab does not clearly teach that “an outer edge of the die support structure is set in from an outer edge of one of the first largest planar surface or the second largest planar surface”. However, given that that each of the semiconductor die (102, see detail of Figure 2A) has a square or rectangular shape that has a perimeter comprising a closed shape and Figure 2C of Schwab, along with the disclosure that the purpose of the one of the material is to provide support to the at least two semiconductor die, it would have been obvious to one of ordinary skills in the art at the time of the effective filing of the claimed invention to modify Schwab so that the support structure is slightly larger than the dies’ i.e. “an outer edge of the die support structure is set in from an outer edge of one of the first largest planar surface or the second largest planar surface”. The ordinary artisan would have been motivated to modify Schwab for at least the purpose of using a similar shape for the supported element and the supporting element (i.e. the material) but providing slightly larger dimension to easily place dies on the support and not leave any part of the die unsupported.
Regarding claim 10, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) teaches the method of claim 9, but does not teach “a warpage of one of the first largest planar surface or the second largest planar surface is less than 200 microns”. However, Schwab teaches that the reason for warpage of the semiconductor die is that it bends or flexes easily due to reduced thickness and that the amount of warping can be reduced by reinforcing by the rigid support structure (para 23). In other words, Schwab teaches that warpage such as ““a warpage of one of the first largest planar surface or the second largest planar surface” is a result effective variable which is related to thickness; i.e. lower thickness results in lower rigidity causing greater warpage, and as such, warpage can be reduced by increasing rigidity by adding a rigid support to the at least two semiconductor die. Given that “a warpage of one of the first largest planar surface or the second largest planar surface” is a known results effective variable and its dependence on thickness is also known (as explained above), varying the thickness so that the warpage is in specific desired range would not be cause for undue experimentation. "Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) see MPEP 2144.05. Therefore, it would have been obvious to one of ordinary skills in the art at the time of the effective filing of the claimed invention to modify Schwab so that “a warpage of one of the first largest planar surface or the second largest planar surface is less than 200 microns. The ordinary artisan would have been motivated to modify Schwab for at least the purpose of preventing failures that can occur due to excessive flexing or bending due to warpage by providing reinforcement by the rigid support structure (para 23 of Schwab).
Regarding claim 11, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) teaches the method of claim 9, wherein the die support structure is coupled over the two or more semiconductor die before the two or more semiconductor die are singulated from the wafer (para 22)
Regarding claim 12, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) teaches the method of claim 9, further comprising thinning the two or more semiconductor die to a thickness between 0.1 microns and 125 microns (para 30).
Regarding claim 13, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) teaches the method of claim 9, wherein the die support structure is a temporary die support structure (para 21).
Regarding claim 14, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) method of claim 9, wherein a perimeter of the die support structure comprises a circular shape comprising an opening therethrough (para 30).
Regarding claim 16, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) the method of forming a semiconductor device, the method comprising: coupling a die support structure over one of a first largest planar surface or a second largest planar surface of two or more semiconductor die points (as explained for claim 9); and singulating points (as explained for claim 9) the two or more semiconductor die from a wafer to form a semiconductor device; wherein the die support structure comprises two intersecting points (as explained for claim 9).
Regarding claim 16, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) the method of claim 16, wherein the two or more die comprise four die (para 32).
Regarding claim 18, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) the method of claim 16, wherein the die support structure is a permanent die support structure (para 21).
Regarding claim 19, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) the method of claim 16, wherein the die support structure is coupled over the two or more semiconductor die before the two or more semiconductor die are singulated from the wafer (para 27).
Regarding claim 20, Schwab (refer to Figure 2C; also see Figures 2A-2D for more details and labels that are missing in Figure 2C) the method of claim 16, wherein an outer perimeter of the die support structure comprises an X-shape (see para 30 and 41).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AJAY ARORA whose telephone number is (571)272-8347. The examiner can normally be reached 9 AM - 5 PM.
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/AJAY ARORA/Primary Examiner, Art Unit 2892