Prosecution Insights
Last updated: October 24, 2026
Application No. 18/916,051

DISPLAY DEVICE

Non-Final OA §103§DOUBLEPATENT
Filed
Oct 15, 2024
Priority
Feb 10, 2021 — RE 10-2021-0019362 +1 more
Examiner
MANDALA, MICHELLE
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
926 granted / 1017 resolved
+23.1% vs TC avg
Moderate +8% lift
Without
With
+7.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
20 currently pending
Career history
1043
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
51.0%
+11.0% vs TC avg
§102
31.8%
-8.2% vs TC avg
§112
10.3%
-29.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1017 resolved cases

Office Action

§103 §DOUBLEPATENT
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-8 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 2, 4, 6, 7-9 of U.S. Patent No. 12,137,590. Although the claims at issue are not identical, they are not patentably distinct from each other because a species claim anticipates a generic claim; therefore, the claims of the patent anticipate the examined claims. Claims being examined Patented claims (from US 12,137,590) 1 1 & 2 2 1 3 6 4 4 5 1 6 7 7 8 8 9 Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-5 and 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (2023/0189570) in view of Yuan et al. (2022/0165829). Re claim 1, Lin discloses (Fig. 7) a bus electrode (110); a first electrode (15) electrically insulated from the bus electrode; a bank layer (16) exposing a portion of the first electrode and a portion of the bus electrode and covering an edge of the first electrode and an edge of the bus electrode (Fig. 7); an insulating pattern layer (113) arranged on the bus electrode, wherein the insulating pattern layer comprises a first opening (161) overlapping the bus electrode (110); an intermediate layer (17) arranged on the first electrode (15), the bus electrode (110), and the bank layer (16), wherein the intermediate layer (17) comprises a second opening (13) overlapping the first opening (161~ Fig. 8); and a second electrode (18) arranged on the intermediate layer (17) and corresponding to the first electrode (15) and the bus electrode (110), wherein the second electrode (18) contacts the bus electrode (110) through the second opening (13) and the first opening (161). Lin does not disclose a common voltage line and wherein the bus electrode electrically connected to the common voltage line. Yuan et al. disclose comprising a common voltage line electrically connected to the bus electrode ([0015]). It would have been within the scope of one of ordinary skill in the art to combine the teachings of Lin and Yuan et al. to enable the voltage line configuration of Yuan et al. to be added to Lin's device to be made with the same configuration in order to reduce an equivalent resistance of the voltage line and reducing a loss of signals transmitted by the voltage line. Lin does not disclose wherein the insulating pattern includes an inorganic material. It is well known in the art before Applicant's effective filing date to use an inorganic material for an insulating layer or pattern in a display device. Therefore, it would have been obvious to one of ordinary skill in the art before Applicant's effective filing date to use an inorganic material for the insulating pattern for its own intended purpose. Re claim 2, One of ordinary skill in the art would have been led to the recited width through routine experimentation to achieve a desired exposure of the layers and/or device beneath the openings. In addition, the selection of width, it's obvious because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996)(claimed ranges or a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill or art) and In re Aller, 105 USPQ 233 (CCPA 1995) (selection of optimum ranges within prior art general conditions is obvious). Note that the specification contains no disclosure of either the critical nature of the claimed width or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen width or upon another variable recited in a claim, the Applicant must show that the chosen width is critical. In re Woodruf, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Re claim 3, Lin discloses wherein the bank layer (16) comprises a bank opening corresponding to the bus electrode (110), and a width of the bank opening is greater than each of the width of the first opening and the width of the second opening (Fig.7). Re claim 4, Lin discloses wherein the second electrode (18) contacts an upper surface of the intermediate layer (17), an upper surface of a portion of the insulating pattern layer (113) surrounding an edge of the first opening, and an upper surface of the bus electrode (110) (Fig. 1). Re claim 5, Lin discloses wherein the first opening overlaps the second opening (Fig. 1). Re claims 7 and 8, Yuan et al. disclose a common voltage line electrically connected to the bus electrode, wherein the common voltage line is electrically connected to at least one auxiliary pattern that overlaps the common voltage line and is arranged on a different layer from the common voltage line ([0015], [0117]); further comprising an auxiliary line extending in a direction crossing the common voltage line (Fig. 13). Re claim 9, It would have been obvious to one having ordinary skill in the art at before the effective filing date of the invention to add an adjacent common voltage line, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Notwithstanding, it would have been an obvious matter of design choice bounded by well known manufacturing constraints and ascertainable by routine experimentation and optimization to choose these particular configuration because applicant has not disclosed that the configuration/dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension/configuration. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Re claim 10, Lin discloses wherein an outer edge of the insulating pattern layer (113) is covered with the bank layer (16). Claim(s) 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Yuan et al. as applied to claims 1-5 and 7-10 above, and further in view of Kim et al. (2014/0239262). The combination does not disclose wherein the bus electrode and the first electrode are disposed on a same layer, and include a same material. Kim et al. disclose wherein the first electrode (171) and the bus electrode (190) are located on a same layer and include a same material. It would have been within the scope of one of ordinary skill in the art to combine the teachings of Lin, Yuan et al. and Kim et al. to enable the electrodes to be made of the same material and on the same layer of Lin to be the same according to the teachings of Kim et al. because one of ordinary skill in the art would have been motivated to look to alternative suitable materials for the disclosed etch stop material of Lee et al. and art recognized suitability for an intended purpose has been recognized to be motivation to combine. See MPEP 2144.07. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHELLE MANDALA whose telephone number is (571)272-1858. The examiner can normally be reached 8:00-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHELLE MANDALA/ Primary Examiner, Art Unit 2893 October 14, 2026
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Prosecution Timeline

Oct 15, 2024
Application Filed
Oct 16, 2026
Non-Final Rejection mailed — §103, §DOUBLEPATENT (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+7.9%)
2y 2m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1017 resolved cases by this examiner. Grant probability derived from career allowance rate.

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