Prosecution Insights
Last updated: August 17, 2026
Application No. 18/938,961

MEMORY DEVICE WITH WRITE PULSE TRIMMING

Non-Final OA §102§103
Filed
Nov 06, 2024
Priority
Jan 04, 2021 — divisional of 11/605,427 +2 more
Examiner
ALROBAIE, KHAMDAN N
Art Unit
2824
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
563 granted / 653 resolved
+18.2% vs TC avg
Minimal +2% lift
Without
With
+2.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
24 currently pending
Career history
680
Total Applications
across all art units

Statute-Specific Performance

§101
4.2%
-35.8% vs TC avg
§103
38.2%
-1.8% vs TC avg
§102
27.9%
-12.1% vs TC avg
§112
18.5%
-21.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 653 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDS) submitted on 05/19/2025 and 01/30/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,165,704. Although the claims at issue are not identical, they are not patentably distinct from each other because the current application recites similar limitations as the issued patent. In other words, the current application wrote the claim limitations as a device claims instead of method claims as recited in the issued patent. The features of the current application and the issued patent are similar and obvious variant from each other. Claims 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,605,427. Although the claims at issue are not identical, they are not patentably distinct from each other because the current application recites similar limitations as the issued patent. In other words, the current application is broader than the issued patent. Claims 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,742,021. Although the claims at issue are not identical, they are not patentably distinct from each other because the current application recites similar limitations as the issued patent. In other words, the current application is broader than the issued patent. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 2-4 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US 2012/0106242 A1). Regarding claim 2, Lee teaches a memory device, comprising: a memory cell array comprising a plurality of memory cells (Fig. 1, memory array 500); a temperature sensor configured to detect a temperature of the memory cell array (Fig. 1, Temperature detection block 100, detects the temperature of the memory device and determines a target write pulse width based on the detected temperature); a controller coupled to the temperature sensor and configured to determine a target write pulse width based on the detected temperature of the memory cell array (Fig. 1, control block 200, will determine a target write pulse width based on the detected temperatures) a pulse generator circuit coupled to the controller and configured to generate a write pulse having the target write pulse width (Fig. 1, write driver 300 configured to generate a write pulse having the target write pulse width); and a write circuit coupled to the pulse generator and configured to write data into the plurality of memory cells using the write pulse (Fig. 1, switching circuit 400 write the data into the memory cells). Regarding claim 3, Lee teaches the memory device of claim 2, wherein the temperature of the memory cell array is the temperature of the memory device (Temperature detection block 100, detects temperature of the memory device). Regarding claim 4, Lee further teaches the memory device of claim 2, wherein the memory cell array includes one of: ferroelectric random access memories (FRAMs), magnetic random access memories (MRAMs), resistive random access memories (RRAMs), and phase-change memories (PCMs) (Fig. 1, variable resistor random access memory 500). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 5-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee as applied to claim 2 above, and further in view of Muchherla et al. (US 2016/0117216 A1). Regarding claim 5, Lee further teaches the memory device of claim 2, wherein to determine the target write pulse width based on the detected temperature of the memory device (Fig. 1). Lee does not explicitly teach a table to store the temperature and their corresponding pulse width. However, It is well-known in the art to use table to store information for the operation ranges and settings to operate the memory device. To expedite the prosecution of the current case, Muchherla is used to teach lookup table to store operation information such as temperature and their corresponding settings to write data into the memory device (Fig. 1. Write Temperature Information 118). Regarding claim 6, Muchherla further teaches the memory device of claim 5, wherein to determine the target write pulse width based on the detected temperature of the memory device, the controller is configured to identify the temperature of the memory array in the temperature dependent table (Fig. 1, Write Temperature Information 118). Regarding claim 7, Lee further teaches the memory device of claim 6, wherein to determine the target write pulse width based on the detected temperature of the memory device, the controller is configured to identify the target write pulse width associated with the temperature of the memory array (¶0030). Regarding claim 8, Lee further teaches the memory device of claim 5, wherein the temperature dependent tables generated in an initial testing procedure (¶0071). Regarding claim 9, Lee further teaches the memory device of claim 5, wherein the temperature dependent table is written into a storage area of the memory device (Fig. 1, lookup table stored in memory device 112-1). Regarding claim 10, Lee further teaches the memory device of claim 5, wherein the temperature dependent table includes a plurality of temperature dependent tables corresponding to a plurality of applications (¶0073). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAMDAN N ALROBAIE whose telephone number is (571)270-7099. The examiner can normally be reached Monday to Thursday (8AM till 6PM). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Richard Elms can be reached at (571) 272-1869. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Khamdan N. Alrobaie/Primary Examiner, Art Unit 2824
Read full office action

Prosecution Timeline

Nov 06, 2024
Application Filed
Jul 28, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
89%
With Interview (+2.5%)
2y 2m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 653 resolved cases by this examiner. Grant probability derived from career allowance rate.

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