DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 15-17, 19, 21-22, 25 and 31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Biskeborn [US 20150337431] in view of Murata [JP2008247722].
Claim 15: Biskeborn teaches a method for manufacturing a coating onto a stainless steel structure [abstract] by forming a metal oxide bonding layer on the stainless steel structure [abstract], wherein the metal oxide is a metal oxide of the stainless steel by exposing portion of the stainless steel to oxidization to form the metal oxide (which inherently comprises a metal from the metal substrate) [0006] and further depositing an alumina layer to the metal oxide layer (buffer layer) [0006].
However, the prior art fails to teach the buffer layer is characterized by a stress buffer layer coefficient of thermal expansion (CTE) that is less than metal substrate CTE and bonding layer CTE. Murata is provided.
Murata teaches a ceramic based composite member with mismatched coefficient of thermal expansion of a coating layer and substrate can be relaxed and adhesion of the coating layer to the substrate can be improved by adding a stress relaxing layer which comprises a coefficient thermal expansion value between the substrate and the coating layer [abstract]. Although Murata does not explicitly teaches the stress buffer layer CTE is less than the CTE of the metal substrate and bonding layer, it would have been obvious to one of ordinary skill in the art to optimize the CTE of each layer to adjust the stress amount due to the difference in CTE to improve interlayer adhesion [pg 2 Tech-problem].
Claim 16: Biskeborn teaches the substrate is stainless steel [abstract] and the oxide formed is of the stainless steel, wherein Biskeborn teaches the stainless steel comprises chromium [0002].
Claim 17: Biskeborn teaches the buffer layers comprises aluminum oxide [abstract; 0028].
Claim 19: Although Murata does not explicitly teach the ratio of the metal substrate CTE to environmental barrier layer CTE is greater than or about 20:1 again it would have been obvious to one of ordinary skill in the art to optimize the ratio of CTE among the layer so as to promote better adhesion and reduce spalling.
Claims 21-22: Although the prior art does not explicitly teach the claimed CTE ranges, it would have been obvious to one of ordinary skill in the art to optimize the CTE of each layer as a workable parameter through routine experimentation since Murata teaches the CTE affects the adhesion between layers and issues with spalling.
Claim 25: Biskeborn teaches the stress buffer layer has a thickness of 5-20 nm (less than 50 nm) [0050].
Claim 31: Biskeborn teaches the substrate is stainless steel [abstract] and the oxide formed is of the stainless steel, wherein Biskeborn teaches the stainless steel comprises chromium [0002].
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Biskeborn in view of Murata as applied to claim 15 above, and further in view of Kolev [US 20130209767].
Teaching of the prior art is aforementioned, but does not appear to teach the limitations of claim 18. Kolev is provided.
Claim 18: However, the prior art fails to further teach depositing an environmental barrier layer comprising silicon oxide on the stress buffer layer. Kolev is provided.
Kolev teaches that there are many applications in which coated steel articles need good resistance to corrosion, such as medical implants [0002]. Kolev further teaches that a coated steel article needs high hardness and resistance can include mixed layers such as alumina and silica [0007]. Although Kolev does not explicitly teach the silica layer on the alumina it would have been obvious to one of ordinary skill in the art to arrange such that the silica layer is on the alumina layer for the mixed layers from a finite number of ways of depositing the mixed layers with the two oxide materials. It would have been obvious to one of ordinary skill in the art to further modify the protective layer of Biskeborn to include a mixed layer such as depositing silica on alumina since the Kolev teaches the mixed oxide layers are known and operable as protective barrier coating for steel articles.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Biskeborn in view of Murata as applied to claim 15 above, and further in view of Quintana-Ponce [US 20210251766].
Teaching of prior art is aforementioned but Biskeborn does not appear to teach the bonding layer is 10 nm or less. Quintana-Ponce is provided.
Claim 20: Quintana-Ponce teaches a bonding layer can have a variety of thickness such as 0.5nm to 10nm [0150]. It would have been obvious to one of ordinary skill in the art to provide the claimed thickness for the bond layer since Quintana-Ponce teaches such range is known and operable in the field [0144].
Claim(s) 23-24 and 26-27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Biskeborn in view of Murata as applied to claim 15 above, and further in view of Graham [US 20100132762].
Teaching of prior art is aforementioned but Biskeborn does not appear to teach the barrier layer comprises hafnium oxide and comprises 50 wt % or more. Graham is provided.
Claims 23-24: Graham teaches that the barrier layer can be either silicon dioxide and hafnium oxide [0013]. It would have been obvious to one of ordinary skill in the art to provide these oxides as the barrier layer since Graham teaches these are known and operable barrier materials against corrosion [0004]. As for 50 wt% since Graham teaches the barrier being hafnium oxide, it would have been obvious to one of ordinary skill in the art that a hafnium oxide layer would be closer to 100 wt % therefore it would have been obvious to one of ordinary skill in the art that a hafnium oxide layer would comprise material greater than 50 wt %.
However, the prior art does not appear to teach depositing an environmental barrier layer on the stress layer which is equal or greater than 50 nm or 75 nm. Graham is provided.
Claims 26-27: Graham teaches a barrier layer on the buffer layer can be characterized by having at least thickness of 50nm [0100]. It would have been obvious to one of ordinary skill in the art to provide the barrier layer on the buffer layer to be characterized with a thickness of 50nm as taught by Graham since Graham these are known and operable thickness range for barrier layers on buffer layers used to protect against corrosion [0004]. As for thickness greater than 75 nm where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. (See MPEP 2144.05.I).
Claim(s) 28-29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Biskeborn in view of Murata as applied to claim 15 above, and further in view of Sakamaki [JP2006307311].
Teaching of the prior art is aforementioned, but does not appear to teach substrate is a semiconductor component and other limitations of claims 28-29. Sakamaki is provided.
Claim 28-29: Sakamaki teaches thermal spraying a film to yield uniform film (conformal) [pg 9, para 8-9]. Sakamaki teaches the metal substrate with the barrier layer can be of a semiconductor fabrication apparatus [abstract]. It would have been obvious to one of ordinary skill in the art to use the barrier multilayer system on semiconductor fabrication apparatus since Sakamaki teaches such articles are often exposed to corrosion as well [abstract].
Claim(s) 29-30, 32-33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Biskeborn in view of Murata as applied to claim 15 above, and further in view of Hall [US 20180155828].
Teaching of the prior art is aforementioned, but does not appear to teach the limitations of claims 29-30, 32-33. Hall is provided.
Claims 29-30: Hall teaches the barrier layer is on a semiconductor chamber component [abstract]. It would have been obvious to one of ordinary skill in the art to provide a barrier layer to semiconductor components since Hall teaches such layer can also be used operably in the semiconductor art.
Claim 32-33: Hall teaches the barrier layer comprises silica [0014; 0040], and although Hall does not explicitly teach the weight percent, it would have been obvious to one of ordinary skill in the art to optimize the weight percent of the silica composition as result effective variable through routine experimentation to yield the desired film characteristics.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MANDY C LOUIE whose telephone number is (571)270-5353. The examiner can normally be reached Monday to Friday 1:00PM to 4:00PM PT.
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/MANDY C LOUIE/Primary Examiner, Art Unit 1718
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