DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
In addressing the rejection ground, each claim may not have been separately discussed to the extent the claimed features are the same as or similar to the previously-discussed features; the previous discussion is construed to apply for the other claims in the same or similar way.
In the office action, “/” should be read as and/or as generally understood. For example, “A/B” means A and B, or A or B.
Priority Day
A review of the disclosures of both the instant application and the provisional application, by the examiner, reveals that claims 1-19 fail to have support in the provisional application. More specifically, e.g. claim 1 lacks support in the earlier filed provisional application because at least it does not support subject matters, "a resistance temperature coefficient of the second material is equal to or greater than a resistance temperature coefficient of the first material", and thus the effective filing date of the claims 1-19 in the application appears to be 05/18/2023.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7 and 9-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miwa (US 2021/0090930) in view of Parkhe (US 2017/0215230).
Regarding claim 1, Miwa discloses a substrate processing apparatus [e.g. fig. 2] comprising: an electrostatic chuck [e.g. 10] arranged on the base and including: a dielectric member [e.g. 40] having a support surface with a substrate support surface [e.g. the top surface S1]; at least one heater electrode layer [e.g. 50] arranged inside the dielectric member and formed of a first material; and at least one resistive layer [e.g. 61/62/63/60/600, also see para. 0041, fig. 4] arranged inside the dielectric member and formed of a second material, wherein a resistance temperature coefficient of the second material is equal to or greater than a resistance temperature coefficient of the first material [see at least para. 0058]; a control circuit [e.g. the circuit controlling the voltage applied to the heat generating resistor, see at least paras. 0003] configured to control power to be applied to the at least one heater electrode layer; and a detection circuit [e.g. a voltmeter for measuring the voltage applied to each temperature measuring resistor 600, para. 0047] configured to detect a voltage applied to the at least one resistive layer. Miwa does not disclose a chamber having a processing space provided therein; a base arranged inside the processing space and having an internal space provided therein; arrange heating related circuitry inside the internal space. However, Parkhe discloses a chamber [e.g. 100] having a processing space [e.g. 124]; a base [e.g. 125] arranged inside the processing space and having an internal space [e.g. 502 fig. 5/202 fig. 2] provided therein; arrange heating related circuitry [e.g. 210, 220] inside the internal space [e.g. 502/202]. The combination also discloses the at least one resistive layer having a thickness of 300μm or less [Miwa suggests the temperature measuring resistors should be made thin, such that the resistance value is high and the resolution of the temperature measurement based on the resistance values of the temperature measuring resistors 600 can be improved, see at least paras. 0067, 0087, 0089, 0090. Parkhe discloses the temperature sensors 141 in one embodiment are RTDs. The RTDs may be formed from Platinum (Pt), Nickel (Ni), Nickel-chromium (NiCr), Tantalum (Ta), Tungsten (W), or another suitable material. The RTDs may have a thickness of less than a micron to a few microns. See at least paras. 0064]
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Miwa in accordance with the teaching of Parkhe regarding a chamber in order to provide a chamber for housing the holding device of Miwa and arrange heating related circuitry adjacent to the cooling base [paras. 0043, 0100, fig. 2].
Regarding claim 2, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein the resistance temperature coefficient of the second material is greater than the resistance temperature coefficient of the first material [see at least para. 0058 Miwa].
Regarding claim 3, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein the second material is tungsten [para. 0047 Miwa].
Regarding claim 4, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein the thickness of the at least one resistive layer is 100μm or less [Miwa suggests the temperature measuring resistors should be made thin, such that the resistance value is high and the resolution of the temperature measurement based on the resistance values of the temperature measuring resistors 600 can be improved, see at least paras. 0067, 0087, 0089, 0090. Parkhe discloses the temperature sensors 141 in one embodiment are RTDs. The RTDs may be formed from Platinum (Pt), Nickel (Ni), Nickel-chromium (NiCr), Tantalum (Ta), Tungsten (W), or another suitable material. The RTDs may have a thickness of less than a micron to a few microns. See at least paras. 0064].
Regarding claim 5, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein a position of the at least one heater electrode layer in a thickness direction inside the electrostatic chuck is different from a position of the at least one resistive layer in the thickness direction [see at least fig. 2 Miwa, fig. 3 Parkhe].
Regarding claim 6, the combination discussed above discloses the substrate processing apparatus of Claim 5, wherein the at least one heater electrode layer extends between the at least one resistive layer and the support surface [see at least figs. 3C, 3D Parkhe].
Regarding claim 7, the combination discussed above discloses the substrate processing apparatus of Claim 5, wherein the at least one resistive layer extends between the at least one heater electrode layer and the support surface [see at least fig. 2 Miwa, figs. 3A-3C Parkhe].
Regarding claim 9, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein a position of the at least one heater electrode layer in a thickness direction inside the electrostatic chuck is same as a position of the at least one resistive layer in the thickness direction [see at least fig. 2 Miwa, fig. 3 Parkhe].
Regarding claim 10, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein the support surface includes a plurality of regions, wherein the electrostatic chuck has a plurality of zones respectively having the plurality of regions [see at least figs. 2, 4 Miwa, e.g. segments SE], wherein the at least one heater electrode layer includes a plurality of heater electrode layers [e.g. 140, 154 Parkhe; in addition, it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art, St Regis Co. v, Bemis Co., 193 USPQ 8.], wherein the plurality of heater electrode layers are arranged inside the plurality of zones, respectively, wherein the at least one resistive layer includes a plurality of resistive layers [e.g. layers 61, 62, 63 Miwa], wherein the plurality of resistive layers include at least one additional resistive layer arranged inside the plurality of zones, wherein the control circuit is configured to control each of a plurality of powers to be applied to the plurality of heater electrode layers, and wherein the detection circuit is configured to detect each of a plurality of values of voltages applied to the plurality of resistive layers [see at least para. 0048 Miwa].
Regarding claim 11, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein the support surface includes a plurality of regions, wherein the electrostatic chuck has a plurality of zones [e.g. SE Miwa] respectively having the plurality of regions, wherein the at least one heater electrode layer includes a plurality of heater electrode layers [e.g. 140, 154 Parkhe; in addition, it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art, St Regis Co. v, Bemis Co., 193 USPQ 8.], wherein the plurality of heater electrode layers are arranged inside the plurality of zones, respectively, wherein the at least one resistive layer includes a plurality of resistive layers [e.g. layers 61, 62, 63 Miwa], wherein the plurality of resistive layers include a resistive layer arranged across two or more corresponding zones among the plurality of zones [see at least figs. 2, 4 Miwa], wherein the control circuit is configured to control each of a plurality of powers to be applied to the plurality of heater electrode layers, and wherein the detection circuit is configured to detect each of a plurality of values of voltages applied to the plurality of resistive layers [see at least para. 0048 Miwa].
Regarding claim 12, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein the at least one resistive layer includes a plurality of layers [e.g. layers 61, 62, 63 Miwa], and wherein the plurality of layers are stacked one above another in a series connection manner between the support surface and the base inside the electrostatic chuck [see at least fig, 4 of Miwa].
Claims 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miwa (US 2021/0090930) in view of Parkhe (US 2017/0215230) and Tandou et al. (hereinafter Tandou, US 2017/0025255).
Regarding claim 13, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein the electrostatic chuck further includes at least one radio-frequency electrode layer, and wherein the at least one radio-frequency electrode layer is electrically connected to the base [see at least fig. 1 of Parkhe] , except and is configured to surround the at least one heater electrode layer and the at least one resistive layer inside the electrostatic chuck. However, Tandou discloses at least a heat generation layer 5 is surrounded by at least one radio-frequency electrode layer [a conductive layer 7, a shield layer (metal) 6, and an electrode block 1 to which a high frequency power 21 is applied. The conductive layer is connected to electrode block 1 and the shield layer. See para. 0015. Also see figs. 4-8 (see 2-1-1 to 2-1-4 fig. 8).]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Miwa and Parkhe in accordance with the teaching of Tandou regarding surrounding heating layers in order to suppress the current of the high-frequency power from flowing to the heater, suppress heat generation in a line for feeding the heater, and/or provide high-frequency power for bias formation with a frequency of a wider range [para. 0016].
Regarding claim 14, the combination discussed above discloses the substrate processing apparatus of Claim 13, further comprising: a radio-frequency power supply [see at least 138 fig. 1 of Parkhe, 21 fig. 3 of Tandou] electrically connected to the base.
Regarding claim 15, the combination discussed above discloses the substrate processing apparatus of Claim 13, wherein the electrostatic chuck further includes an electrostatic electrode [e.g. electrostatic adsorption layer 4 fig. 4 of Tandou] , and wherein the electrostatic electrode extends between the support surface and the at least one radio-frequency electrode layer.
Claims 16-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miwa (US 2021/0090930) in view of Parkhe (US 2017/0215230) and Endo et al. (hereinafter Endo, US 2021/0265143).
Regarding claim 16, the combination discussed above discloses the substrate processing apparatus of Claim 1, except wherein the detection circuit includes: a resistive voltage-dividing circuit including the at least one resistive layer and a reference resistor connected in series to the at least one resistive layer; and an A/D converter configured to convert a voltage applied to the at least one resistive layer into a digital value. However, Endo discloses a resistive voltage-dividing circuit including the at least one resistive layer [e.g. 201 fig. 5] and a reference resistor [e.g. 831] connected in series to the at least one resistive layer; and an A/D converter [e.g. 832] configured to convert a voltage applied to the at least one resistive layer into a digital value. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Miwa and Parkhe in accordance with the teaching of Endo regarding an ADC in order to outputs a voltage value converted into a digital signal [para. 0064].
Regarding claim 17, the combination discussed above discloses the substrate processing apparatus of Claim 16, wherein the A/D converter is connected to one end of the at least one resistive layer, and wherein the one end of the at least one resistive layer is connected to the reference resistor [see at least fig. 5 Endo].
Regarding claim 18, the combination discussed above discloses the substrate processing apparatus of Claim 1, wherein the detection circuit includes: a constant-current source [see 830, 831 fig. 5 Endo] connected to the at least one resistive layer [e.g. 201]; and an A/D converter [e.g. 832] configured to convert a voltage applied to the at least one resistive layer into a digital value. Please also see rejection of claim 16.
Regarding claim 19, the combination discussed above discloses the substrate processing apparatus of Claim 18, wherein the A/D converter is connected to one end of the at least one resistive layer connected to the constant-current source [see at least fig. 5 Endo].
Allowable Subject Matter
Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICK C CHEN whose telephone number is (571)270-7207. The examiner can normally be reached M-F Flexible 9:00-5:30.
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/PATRICK C CHEN/Primary Examiner, Art Unit 2842