DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
In addressing the rejection ground, each claim may not have been separately discussed to the extent the claimed features are the same as or similar to the previously-discussed features; the previous discussion is construed to apply for the other claims in the same or similar way.
In the office action, “/” should be read as and/or as generally understood. For example, “A/B” means A and B, or A or B.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-10 of U.S. Patent No. 12,206,376. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-10 of U.S. Patent No. 12,206,376 anticipates claim 1.
Claims 1-2 and 8-19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-10 of U.S. Patent No. 12,206,376. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-10 of U.S. Patent No. 12,206,376 anticipate claims 1-2 and 8-19.
Claims 6 and 8-19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 23-32 of U.S. Patent No. 12,206,376. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 23-32 of U.S. Patent No. 12,206,376 anticipates claims 6 and 8-19.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 8-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Staudinger (US 2013/0194017) in view of George US 2010/0066427 (or Lam (US 2015/0171828).
Regarding claim 8, Staudinger discloses a plurality of series-coupled phase shifter cells [e.g. fig. 2/1] each providing at least one selectable phase shift state, wherein at least one phase shifter cell [e.g. 107, 109/109,111 or any two immediately adjacent phase shifting element] includes at least two selectable signal paths [each phase shifting element has at least one selectable signal path], each selectable signal path having an active state [e.g. the bottom path] and an inactive state [e.g. the top path], wherein a first selectable signal path initially in the active state remains in the active state for a selected period of time when a next selectable signal path is set to the active state, and thereafter the first selectable signal path is set to the inactive state. Staszewski does not disclose a distinct switching delay time.
However, George discloses a distinct switching delay time [see at least para. 0015, 0020, 0024, figs. 3-5], such that the combination discloses at least one phase shifter cell has a switching delay time distinct from the switching delay time of at least one other phase shifter cell. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Staudinger in accordance with the teaching of George regarding control signals in order to reduce or eliminate switch latch-up problem [para. 0015].
Alternatively, Lam discloses a distinct switching delay time [see at least abstract, figs. 5-6], such that the combination discloses at least one phase shifter cell has a switching delay time distinct from the switching delay time of at least one other phase shifter cell. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Staudinger in accordance with the teaching of Lam regarding the timing of state transitions in order to significantly reducing glitches [see at least abstract].
Regarding claim 9, the combination discussed above discloses the plurality of series-coupled phase shifter cells of claim 8, wherein at least two phase shifter cells provide approximately the same selectable phase shift state but have distinct switching delay times.
Regarding claim 10, the combination in claim 9 discloses the plurality of series-coupled phase shifter cells of claim 8, wherein at least three phase shifter cells provide approximately the same selectable phase shift state but have distinct switching delay times.
Regarding claim 11, the combination discussed above discloses the plurality of series-coupled phase shifter cells of claim 8, further including a control signal generation circuit [e.g. 123] coupled to the selectable signal paths of at least one phase shifter cell, and configured to be coupled to a master control signal [see 157] , for generating a sequence of time-delayed control signals [e.g. 1a, 1b, 2a,… Staudinger, also see at least para. 0015, 0020, 0024, figs. 3-5 George/ see at least abstract, figs. 5-6 Lam] for the coupled selectable signal paths such that when switching from the first selectable signal path initially in the active state to the next selectable signal path initially in the inactive state, the first selectable signal path remains in the active state for a selected period of time while the next selectable signal path is set to the active state, and thereafter the first selectable signal path is set to the inactive state.
Regarding claim 12, Staudinger discloses the plurality of series-coupled phase shifter cells of claim 8, wherein at least one phase shifter cell includes at least two selectable signal paths [each phase shifting element has at least one selectable signal path] and a selectable reference path [see 129, S1b, 143; 151. S2b, the capacitor], each selectable signal path and the selectable reference path having an active state and an inactive state, wherein: (a) a first selectable signal path initially in the active state remains in the active state for a selected period of time [see at least para. 0015, 0020, 0024, figs. 3-5 George/ see at least abstract, figs. 5-6 Lam] when a next selectable signal path is to be set to the active state; (b) the selectable reference path is set to the active state during the selected period of time and before the next selectable signal path is set to the active state; (c) the next selectable signal path is set to the active state and the first selectable signal path is set to the inactive state; and (d) thereafter the selectable reference path is set to the inactive state.
Regarding claim 13, the combination discussed above discloses the plurality of series-coupled phase shifter cells of claim 12, further including a control signal generation circuit [e.g. 123] coupled to the selectable signal paths and the selectable reference path of at least one phase shifter cell, and configured to be coupled to a master control signal [see 157], for generating a sequence of time-delayed control signals [see at least para. 0015, 0020, 0024, figs. 3-5 George; or see at least abstract, figs. 4-5 Lam] for the coupled selectable signal paths and selectable reference path such that when switching from the first selectable signal path initially in the active state to the next selectable signal path initially in the inactive state, the first selectable signal path remains in the active state for a selected period of time while the selectable reference path is set to the active state, and thereafter the next selectable signal path is set to the active state and the first selectable signal path is set to the inactive state, and thereafter the selectable reference path is set to the inactive state.
Regarding claim 14, the combination discussed above discloses the plurality of series-coupled phase shifter cells of claim 12, except wherein the first selectable signal path has an opposite phase shift polarity with respect to the next selectable signal path. However, such the opposite phase shift polarity, is just am optimization for the circuitry and it is a design choice to achieve that optimum phase, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Regarding claim 15, the combination discussed above discloses the plurality of series-coupled phase shifter cells of claim 8, wherein at least one selectable phase shift state of at least one phase shifter cell includes at least two phase shifting states [e.g. the top path for 107, the bottom path for 109; the bottom path for 107, the top path for 109; or the bottom path for 107, the bottom path for 109, Staudinger] and a through-path state [e.g. the top path for 107, the top path for 109], wherein when switching from a first phase shifting state [e.g. the top path for 107, the bottom path for 109; the bottom path for 107, the top path for 109; or the bottom path for 107, the bottom path for 109] to a next phase shifting state [e.g. the bottom path for 107, the top path for 109; the bottom path for 107, the bottom path for 109; or the top path for 107, the bottom path for 109], the at least one phase shifter cell is set to the through-path state before being set to the next phase shifting state.
Regarding claim 16, Staudinger discloses the plurality of series-coupled phase shifter cells of claim 15, further including a control signal generation circuit coupled to at least one phase shifter cell and configured to be coupled to a master control signal [see 107], the control signal generation circuit configured to generate a sequence of time-delayed control signals [see at least para. 0015, 0020, 0024, figs. 3-5 George; or see at least abstract, figs. 4-5 Lam] for the coupled at least one phase shifter cell in response to the master control signal such that when switching from the first phase shifting state to the next phase shifting state, the coupled at least one phase shifter cell is set to the through-path state before being set to the next phase shifting state.
Regarding claim 17, the combination discussed above discloses the plurality of series-coupled phase shifter cells of claim 16, wherein the control signal generation circuit is configured to delay generating the time-delayed control signals for a selectable period time.
Allowable Subject Matter
Claims 1-7 are allowed. Claims 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICK C CHEN whose telephone number is (571)270-7207. The examiner can normally be reached M-F Flexible 8:00-16:30.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PATRICK C CHEN/Primary Examiner, Art Unit 2836
Prosecution Insights