Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, (claims 1-13) in the reply filed on 08/10/2026 is acknowledged.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-5, 7-13 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 1, 2, 3, 4, 5, 5, 5, 5, 6, 7, 8 respectively of copending Application No. 18/969,099 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because the instant application claim is broader in every aspect than the application claim and is therefore an obvious variant thereof. Although the conflicting claims are not identical, they are not patentably distinct from each other because claim 1 is generic to all that is recited in claim 1 of the application. That is, claim 1 is anticipated by claim 1 of the application. Similarly claims 2-5, 7-13 are generic to all that is recited in claim 2, 3, 4, 5, 5, 5, 5, 6, 7, 8 respectively of the application.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claims 1-5 and 7-10 and 12-13 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 2, 2, 3, 4, 5, 6, 6, 7, 7, 10, 12 respectively of copending Application No. 18/981,395 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because The instant application claim is broader in every aspect than the application claim and is therefore an obvious variant thereof. Although the conflicting claims are not identical, they are not patentably distinct from each other because claim 1 is generic to all that is recited in claim 2 of the application. That is, claim 1 is anticipated by claim 2 of the application. Similarly claims 2-5 and 7-10 and 12-13 are generic to all that is recited in claims 2, 3, 4, 5, 6, 6, 7, 7, 10, 12 respectively of the application.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim 6 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 5 of copending Application No. 18/969,099 in view of Shen et al. (US 2014/0090879 A1) hereafter Shen.
Regarding claim 6, Application claim 5 discloses all the elements except for wherein the 1-1st metal thin film portion and the 2-1st metal thin film portion are connected using an organic adhesive or a ceramic adhesive means, or using a cladding method. Use of a connecting metal thin film portion (such as conductive adhesive/paste) interposed between the two metal portions are old and well known in the art to obtain reliable electrical and thermal conductivity connection between them. Shen at fig. 2-3 and ¶0021 discloses “Certain embodiment utilize metal layers 13 and 15 that are attached together using an adhesive material. FIG. 3 illustrates an embodiment including an adhesive layer 17 positioned between the lower metal layer 13 and the upper metal layer 15. The adhesive 17 may in certain embodiments include one or more materials selected from the group of an organic adhesive, a metal oxide adhesive, and a thermal release adhesive.” Therefore, it would have been obvious to a person having ordinary skill in the at before the effective filing date to add known conductive material as taught by Shen between two metal films of the application claim 5 to obtain the claim invention, and in order to obtain stress and strain relief. Also, Organic glues do not emit harmful volatile organic compounds (VOCs), making indoor air safer and improving workplace safety.
This is a provisional nonstatutory double patenting rejection.
Claim 6 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 5 of copending Application No. 18/981,395 in view of Shen et al. (US 2014/0090879 A1) hereafter Shen.
Regarding claim 6, Application discloses all the elements except for wherein the 1-1st metal thin film portion and the 2-1st metal thin film portion are connected using an organic adhesive or a ceramic adhesive means, or using a cladding method. Use of a connecting metal thin film portion (such as conductive adhesive/paste) interposed between the two metal portions are old and well known in the art to obtain reliable electrical and thermal conductivity connection between them. Shen at fig. 2-3 and ¶0021 discloses “Certain embodiment utilize metal layers 13 and 15 that are attached together using an adhesive material. FIG. 3 illustrates an embodiment including an adhesive layer 17 positioned between the lower metal layer 13 and the upper metal layer 15. The adhesive 17 may in certain embodiments include one or more materials selected from the group of an organic adhesive, a metal oxide adhesive, and a thermal release adhesive.” Therefore, it would have been obvious to a person having ordinary skill in the at before the effective filing date to add known conductive material as taught by Shen between two metal films of the application claim 5 to obtain the claim invention, and in order to obtain stress and strain relief. Also, Organic glues do not emit harmful volatile organic compounds (VOCs), making indoor air safer and improving workplace safety.
This is a provisional nonstatutory double patenting rejection.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 3-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 3, it is clear that the semiconductor test device of claim 1, wherein the first metal thin film portion comprises a 1-1st metal thin film portion and a 1-2nd metal thin film portion and the second metal thin film portion comprises a 2-1st metal thin film portion and a 2-2nd metal thin film portion, and both first and second thin film portions are connected. Dependent claims are also rejected.
What is not clear; how are they connected i.e. the first metal thin film portion comprises a 1-1st metal thin film portion and a 1-2nd metal thin film portion connected to an upper portion of the 1-1st metal thin film portion and the second metal thin film portion comprises a 2-1st metal thin film portion and a 2-2nd metal thin film portion connected to a lower portion of the 2-1st metal thin film portion.
To expedite the process of the prosecution, it is assumed that the first metal thin film portion comprises a 1-1st metal thin film portion and a 1-2nd metal thin film portion connected to an upper portion of the second metal thin film portion and the second metal thin film portion comprises a 2-1st metal thin film portion and a 2-2nd metal thin film portion connected to a lower portion of the first metal thin film portion.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hironaka et al. (US 2020/0141975 A1) hereafter Hironaka in view of Joseph et al (EP 1 424 748 A2) hereafter Joseph.
Regarding claim 1 Hironaka at fig. 1-3 discloses a semiconductor test device for testing an electrical connection of a semiconductor, comprising: a first membrane portion [6, 13, 14] comprising a plurality of first aperture patterns [openings 8,9,10 in 6] in a thickness direction [vertical direction as shown]; a second membrane portion [ 7, 13, 14] connected to the first membrane portion and comprising a plurality of second aperture patterns [8, 9, 10 in 7] in a thickness direction; and a holder portion [5, fig. 1] comprising a hollow region [for 1] and being connected to an edge of the first membrane portion [6, 13, 14], wherein the first membrane portion comprises a first metal thin film portion 6 having a plurality of the first aperture patterns [openings 8,9,10 in 6]; and a first insulating layer portion [13, 14 in 6, ¶0038] having an insulating material coated on a surface of the first metal thin film portion, the second membrane portion comprises a second metal thin film portion 7 having a plurality of the second aperture patterns [openings 8,9,10 in 7]; and a second insulating layer portion [13, 14 in 7, ¶0038] having an insulating material coated on a surface of the second metal thin film portion.
Hironaka is silent about a conductive thin film layer is formed on side surfaces of each of the first aperture patterns and the second aperture patterns. Joseph in similar environment and at fig. 15, ¶0064-0069 discloses a conductive thin film layer 552 is formed on side surface of each of the aperture patterns. Joseph also at ¶0088 discloses a semiconductor testing apparatus for testing the electrical connections of a semiconductor. The apparatus includes: a first film portion (540, connector body) having a first opening pattern (hole) along its thickness direction; the first film portion including: a first metal thin film portion (544, metal layer) having the first opening pattern; and a first insulating layer portion (550, dielectric layer) formed by coating an insulating material onto the surface of the first metal thin film portion. A conductive thin film layer (552, via liner) is formed on the surface.
Both references belong to the field of semiconductor testing equipment technology and are related in the technical field; moreover, both references have the technology of setting an insulating layer on the surface of a metal layer and an opening, and are common in function or effect; therefore, those with ordinary knowledge in the relevant technical field before the effective filing date have a reasonable motive to simply modify the conductor structure set in the opening pattern of the first and second metal thin film in the testing device disclosed in Hironaka with the technology of forming a conductive thin film layer on the side of the opening pattern disclosed in Joseph, to form microelectronic contacts to mount chips thereby determining that the above-mentioned claim invention. Modified Hironaka discloses said conductive thin film layer is formed on side surfaces of each of the first aperture patterns and the second aperture patterns.
Regarding claim 2, Hironaka at fig. 1-3 discloses the semiconductor test device of claim 1, wherein the second membrane portion is connected to a first surface [bottom surface of 6 facing 7] of the first membrane portion and the holder portion 5 is connected to an edge of a second surface [top surface of 6 for 5] opposite to the first surface of the first membrane portion.
Regarding claim 3, as best understood by the Examiner, Hironaka at fig. 1-3 discloses the semiconductor test device of claim 1, wherein the first metal thin film portion 6 comprises a 1-1st metal thin film portion [bottom portion of 6] and a 1-2nd metal thin film portion [top portion of 6] connected to an upper portion of the second metal thin film portion 7 and the second metal thin film portion 7 comprises a 2-1st metal thin film portion [top portion of 7] and a 2-2nd metal thin film portion connected to a lower portion of thefirst metal thin film portion [bottom portion of 7].
Regarding claim 4, as best understood by the Examiner, Hironaka at fig. 1-3 discloses the semiconductor test device of claim 3, wherein the 1-1st metal thin film portion [bottom portion of 6] and the 2-1st metal thin film portion are connected to each other [top portion of 7].
Regarding claim 13, Modified Hironaka, discloses the semiconductor test device of claim 1, wherein the conductive thin film layer [using 552 as shown of Joseph at fig. 15] is further formed in a horizontal direction at a top of the side surfaces of each of the first aperture patterns and the second aperture patterns.
Claim(s) 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hironaka and Joseph as applied to claim 4 above, and further in view of Shen et al. (US 2014/0090879 A1) hereafter Shen.
Regarding claim 5-6, Modified Hironaka at fig. 1-3 discloses the semiconductor test device of claim 4. Modified Hironaka is silent about a connecting metal thin film portion is interposed between the 1-1st metal thin film portion and the 2-1st metal thin film portion and wherein the 1-1st metal thin film portion and the 2-1st metal thin film portion are connected using an organic adhesive or a ceramic adhesive means, or using a cladding method. Rather, Hironak at ¶0038 discloses a screw to coupled them. Use of a connecting metal thin film portion (such as conductive adhesive/paste) interposed between the two metal portions are old and well known in the art to obtain reliable electrical and thermal conductivity connection between them. Shen at fig. 2-3 and ¶0021 discloses “Certain embodiment utilize metal layers 13 and 15 that are attached together using an adhesive material. FIG. 3 illustrates an embodiment including an adhesive layer 17 positioned between the lower metal layer 13 and the upper metal layer 15. The adhesive 17 may in certain embodiments include one or more materials selected from the group of an organic adhesive, a metal oxide adhesive, and a thermal release adhesive.” Therefore, it would have been obvious to a person having ordinary skill in the at before the effective filing date to add known conductive material as taught by Shen between two metal films to obtain claim invention, and in order to obtain stress and strain relief. Also, Organic glues do not emit harmful volatile organic compounds (VOCs), making indoor air safer and improving workplace safety.
Claim(s) 7-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hironaka and Joseph as applied to claim 3 above, and further in view of Yoshida (US 2007/0145991 A1).
Regarding claim 7, the combination of Hironaka and Joseph discloses all the elements. They are silent about the semiconductor test device of claim 3, wherein a width of a 1-1st aperture pattern (P-11) of the 1-1st metal thin film portion is greater than that of a 1-2nd aperture pattern (P-12) of the 1-2nd metal thin film portion. Yoshida in a similar environment at fig. 3 discloses the semiconductor test device, wherein a width of a 1-1st aperture pattern (P-11) [hole for 13 in a bottom/lower portion of upper 31/31b] of the 1-1st metal thin film portion [upper 3,31b] is greater than that of a 1-2nd aperture pattern (P-12) [hole for 11 in upper portion of upper 31/31b] of the 1-2nd metal thin film portion [upper portion of upper 31]. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify the first metal thin film portion as shaped taught by Yoshida to obtain cantilever portion to hold the electronic component such as probe of Yoshida firmly.
Regarding claim 8, Yoshida discloses the semiconductor test device of claim 7, wherein a width of a 2-1st aperture pattern (P-21) [hole for 13 in an upper portion of lower 31/31b] of the 2-1st metal thin film portion [lower 3,31b] is greater than that of a 2-2nd aperture pattern (P-22) [hole for 12 in lower portion of lower 31/31b] of the 2-2nd metal thin film portion.
Regarding claim 9, Yoshida discloses the semiconductor test device of claim 7, wherein a portion where there is a difference between the 1-1st aperture pattern of the 1-1st metal thin film portion and the 1-2nd aperture pattern of the 1-2nd metal thin film portion is provided as a cantilever portion protruding inward from the first aperture pattern [see 31,31b near 11]. Modified Hironaka therefore discloses a portion where there is a difference between the 1-1st aperture pattern of the 1-1st metal thin film portion and the 1-2nd aperture pattern of the 1-2nd metal thin film portion is provided as a cantilever portion protruding inward from the first aperture pattern.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hironaka and Joseph as applied to claim 3 above, and further in view of Yoshida.
Regarding claim 10, the combination of Hironaka and Joseph discloses the semiconductor test device of claim 3. They are silent about wherein a portion where there is a difference between a 1-1st aperture pattern of the 1-1st metal thin film portion and a 1-2nd aperture pattern of the 1-2nd metal thin film portion is provided as a cantilever portion protruding inward from the first aperture pattern. Yoshida discloses wherein a portion where there is a difference between the 1-1st aperture pattern of the 1-1st metal thin film portion and the 1-2nd aperture pattern of the 1-2nd metal thin film portion is provided as a cantilever portion protruding inward from the first aperture pattern [see 31,31b near 11]. Modified Hironaka therefore discloses a portion where there is a difference between the 1-1st aperture pattern of the 1-1st metal thin film portion and the 1-2nd aperture pattern of the 1-2nd metal thin film portion is provided as a cantilever portion protruding inward from the first aperture pattern. It would have been obvious to a person having ordinary skill in the art before the effective filing date to use shape as taught by Yoshida to modify the combination of Hironak and Joseph to hold the probe as taught by Yoshida.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hironaka and Joseph as applied to claim 1 above, and further in view of Saji et al. (US 5258576), hereafter Saji.
Regarding claim 12, the combination of Hironaka and joseph discloses the semiconductor test device of claim 1. They are silent about wherein the first metal thin film portion and the second metal thin film portion are made of at least one of Invar, Super Invar, nickel-iron alloy, nickel-cobalt alloy, nickel-iron-cobalt alloy, or nickel. Use of these metals are old and well known in the art. Saji at claims 8-13 discloses an electrical insulation layer intervened between superconductor unit layers wherein said superconductor unit layer is a lamination obtained by forming mixed crystal of NbN and TiN on one or two kinds of metal layers selected from the group consisting of copper, aluminum, nickel, stainless steel, titanium, niobium and niobium- titanium alloy by a sputtering method. Therefore, it would have been obvious to a person having ordinary skill in the art to use teaching of Saji to modify both membrane portions with nickel to obtain advantages that nickel arrangement has to offer such as to provide Corrosion Resistance and a flexible, low-temperature electrical and mechanical connection that avoids the thermal stress of traditional welding.
Allowable Subject Matter
Claim 11 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Conclusion
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/PARESH PATEL/Primary Examiner, Art Unit 2858
September 3, 2026
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