Prosecution Insights
Last updated: October 04, 2026

Olum Material Corporation

Technology areas: Chemistry & Materials • Semiconductors, Circuits & Optics

5 pending office actions • 2 art units • 5 examiners • 0 of 5 (0%) have an AI response strategy ready • 1 patents granted in the last 365 days

Analysis

Olum Material Corporation has 5 pending office actions within the Semiconductors, Circuits & Optics technology area. These matters are distributed among 5 distinct examiners, ensuring that each case is reviewed by a different person. The active prosecution is occurring across 2 distinct art units, which suggests a specialized technical focus for the company's current filings.

PATEL, PARESH H is the busiest examiner for the portfolio, currently managing 1 pending office action. Because there are 5 pending office actions and 5 distinct examiners, the administrative workload is spread across the patent office. The involvement of 2 distinct art units means the legal team must navigate the specific guidelines of 2 different examination groups. This structure for the 5 pending office actions in the Semiconductors, Circuits & Optics sector ensures that the company's patenting progress is not tied to the results of a single examiner, as each of the 5 distinct examiners handles only one case.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

5
Total Pending OAs
4
Non-Final OAs
1
Final Rejections
0
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

1
Overdue
0
Due this week
0
Due this month
1
Due in next 60 days
0
Due later

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

5
Hard (100%)
0
Medium (0%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
Multi-statute (no §101)5 (100%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

1
Life Sciences
20% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
1
Semiconductors
20% of docket
0
Mechanical / Eng
0% of docket
3
Business / Other
60% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

50 h
Manual time on pending OAs
10 h
Time saved (low, 20%)
18 h
Time saved (mid, 35%)
0.4 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
PATEL, PARESH H 1 79.5% -1.1%
BRAUNLICH, MARTIN WALTER 1 63.7% +37.6%
RHODES-VIVOUR, TEMILADE S 1 88.7% +7.6%
HE, AMY 1 81.3% +4.3%
CHEN, KEATH T 1 30.2% +24.7%

Hard Cases (5)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 5 ordered by deadline are shown.

App #TitleExaminerDue in
18135937 MASK-SUPPORT ASSEMBLY AND PRODUCING METHOD THEREOF CHEN, KEATH T 24d overdue
18898675 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF HE, AMY 55d
18981416 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF PATEL, PARESH H —
18981395 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF BRAUNLICH, MARTIN WALTER —
18969099 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF RHODES-VIVOUR, TEMILADE S —

Interview Candidates (2)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 2 ordered by deadline are shown.

App #TitleExaminerDue in
18135937 MASK-SUPPORT ASSEMBLY AND PRODUCING METHOD THEREOF CHEN, KEATH T 24d overdue
18981395 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF BRAUNLICH, MARTIN WALTER —

Top Art Units

Art UnitApps
2858 1
1716 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18981416 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF PATEL, PARESH H — §103§112Other Non-Final OA — Pending Dec 13, 2024
18981395 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF BRAUNLICH, MARTIN WALTER — §103§112 Non-Final OA — Pending Dec 13, 2024
18969099 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF RHODES-VIVOUR, TEMILADE S — §102§103Other Non-Final OA — Pending Dec 04, 2024
18898675 SEMICONDUCTOR TEST DEVICE AND MANUFACTURING METHOD THEREOF HE, AMY 2858 §102§103 Final Rejection 55d Pending Sep 27, 2024
18135937 MASK-SUPPORT ASSEMBLY AND PRODUCING METHOD THEREOF CHEN, KEATH T 1716 §103§112 Non-Final OA 24d overdue Pending Apr 18, 2023

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