DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/27/2025, 01/08/2026 and 05/29/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 and is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kang et al. (US 2013/0148405 A1).
Regarding claim 1, Kang teaches a method for operating a memory device, comprising:
receiving, through a word line coupled to a subset of memory cells, a word line voltage (Fig. 1 and Fig. 4, selected word line receives voltage Vs); and
receiving, through a bit line and a select line of unselected memory cells of the subset of memory cells, an inhibit voltage (bit line BL and select line SL for the unselected memory cells receive inhibit voltage Vw2);
wherein the inhibit voltage is a fixed delta off set from the word line voltage (the delta off set between word line voltage Vs and inhibit voltage Vw2 is fixed).
Regarding claim 2, Kang further teaches the method of claim 1, further comprising:
receiving, at a first time and through a bit line of a selected memory cell of the subset of memory cells, a bit line voltage (Fig. 3, selected bit line receives Vw1); receiving, at the first time and through a select line of the selected memory cell of the subset of memory cells, a reference voltage (Fig. 2, select line for the selected memory cell receive reference voltage Vw2); and
receiving, at a second time and through the bit line and select line of the selected memory cell, a first voltage that is a predetermined fraction of the bit line voltage (Fig. 5).
Regarding claim 3, Kang further teaches the method of claim 1, further comprising receiving, at a third time and through the bit line and select line of the selected memory cell, the inhibit voltage (Fig. 5).
Regarding claim 9, Kang further teaches the method of claim 1, further comprising receiving, for the unselected memory cells, the inhibit voltage further through respective switches (Fig. 2, Y-decoder 130 comprises respective switches for selecting the bit lines).
Regarding claim 10, Kang further teaches the method of claim 9, wherein the switches are coupled to the bit line and the select line of the unselected memory cells, respectively (Fig. 2, Y-decoder 130 comprises respective switches for selecting the bit lines, which are directly coupled to the bit lines and indirectly coupled to the select lines).
Allowable Subject Matter
Claims 11-20 are allowed.
Claims 4-8 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
After further search and consideration it is determined that the prior art of record neither anticipated nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach, the following limitation(s) in combination with the remaining claimed limitation:
generating, through a resistor network and a switch network, the inhibit voltage based on the word line voltage.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAMDAN N ALROBAIE whose telephone number is (571)270-7099. The examiner can normally be reached Monday to Thursday (8AM till 6PM).
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/Khamdan N. Alrobaie/Primary Examiner, Art Unit 2824
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