DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 9-10, 14, and 17 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Akutsu et al. (US2018/0218990A1) (hereafter Akutsu).
With respect to claim 9, Akutsu teaches a method for manufacturing an electrode (60) substrate (200) provided with solder bumps (2) , the method comprising: a preparing step of preparing a solder bump forming member comprising a base substrate (1/100) and a substrate (200) having a plurality of electrodes (60), wherein the solder bump forming member comprises a plurality of recesses (figures 1-6); and a plurality of solder particles (2) in the recesses (50), and each of the solder particles has an average particle diameter of 1 to 35 μm and a C.V. value of 20% or less, and a part of each of the solder particles projects from the respective recess (figures 3-4; and paragraph 41); a disposing step of allowing a surface having the recesses of the solder bump forming member and a surface having the electrodes of the substrate to face each other so as to bring the solder particle and the electrode into contact with each other (figures 4-6); and a heating step (resistance heating) of heating the solder particle at a temperature equal to or higher than a melting point of the solder particle (paragraph 60). The process of resistance heating to form metal-bonding between the bumps (2) and the base electrodes (60) would intrinsically require melting of the solder material.
With respect to claim 10, Akutsu teaches wherein in the heating step, the solder particle is heated at a temperature equal to or higher than a melting point of the solder particle while bringing the solder particle and the electrode into contact with each other in a pressurized state (paragraphs 58-60 and 80-82). Note the disclosed pad pitch spacing that corresponds to the pitch between recesses in the transfer body.
With respect to claim 14, Akutsu teaches a removing step of removing the solder bump forming member (1) from the substrate (200), after the heating step (paragraphs 43-44).
With respect to claim 17, Akutsu teaches wherein a distance between the recesses adjacent to each other is 0.1 times or more the average particle diameter of the solder particles (figures 3 and 6; and paragraphs 41 and 92).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9-14 and 16 is/are rejected under 35 U.S.C. 103 as being obvious over Akai et al. (US2021/0114145A1) (hereafter Akai) in view of KR-101408730B1 (hereafter KR ‘730).
The applied reference has a common inventor with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
With respect to claim 9, Akai teaches a method for manufacturing an electrode substrate provided with solder bumps, the method comprising: a preparing step of preparing a solder bump forming member comprising a base substrate (60) and a substrate (the electronic device comprising the disclosed electrodes) having a plurality of electrodes (abstract; and paragraphs 23-25, 34, 49, 52, 77, 94-95s, and 164-166), wherein the solder bump forming member comprises a plurality of recesses (62) (figures 3 and 6); and a plurality of solder particles (1) in the recesses (figures 3 and 6); each of the solder particles has an average particle diameter of 1 to 35 μm and a C.V. value of 20% or less (tables 2, 10, and 15; and claim 2); a disposing step of allowing a surface having the recesses of the solder bump forming member and a surface having the electrodes of the substrate to face each other so as to bring the solder particle and the electrode into contact with each other (paragraph 164); and a heating step of heating the solder particle at a temperature equal to or higher than a melting point of the solder particle (reflow) (paragraphs 24-25 and 87).
With respect to claim 9, Akai does not teach a part of each of the solder particles projects from the respective recess.
However, KR ‘730 teaches a part of each of the solder particles (16) projects from the respective recess (14) (figure 2; and the machine translation).
At the time of filing the claimed invention it would have been obvious to one of ordinary skill in the art to utilize solder particles that project from the respective recesses as taught by KR ‘730 in the process of Akai in order to ensure that the template/base material does not interfere with the solder transfer process.
With respect to claim 10, Akai teaches wherein in the heating step, the solder particle is heated at a temperature equal to or higher than a melting point (reflow) of the solder particle while bringing the solder particle and the electrode into contact with each other in a pressurized state (paragraphs 24-25, 87, and 164).
With respect to claim 11, Akai teaches a reducing step of exposing the solder particle to a reducing atmosphere, before the disposing step (paragraphs 87-92).
With respect to claim 12, Akai teaches a reducing step of exposing the solder particle to a reducing atmosphere, after the disposing step and before the heating step (paragraphs 87-92).
With respect to claim 13, Akai teaches wherein in the heating step, the solder particle is heated at a temperature equal to or higher than a melting point of the solder particle in a reducing atmosphere (paragraphs 87-92).
With respect to claim 14, Akai teaches a removing step of removing the solder bump forming member from the substrate, after the heating step (the base plate 60 of Akai is intrinsically removed prior to placing the bonded electronic device into service (paragraphs 52 and 166).
With respect to claim 16, Akai teaches wherein a planar portion is formed on a part of a surface of each of the solder particles (figures 6-7; and paragraphs 58, 85, and 94).
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Akai and KR ‘730 as applied to claims 9 and 14 above, and further in view of Khaselev et al. (US2006/0260943A1) (hereafter Khaselev).
With respect to claim 15, Akai teaches removing particles with a squeegee and other means after the removing step (paragraphs 83-84), but does not explicitly teach washing.
However, Khaselev teaches washing loose particles (paragraph 55).
At the time of filing the claimed invention it would have been obvious to one of ordinary skill in the art to utilize the washing of Khaselev in the collective process of Akai and KR ‘730 in order to ensure that an accumulation or unwanted number of solder particles does not occur.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Akai and KR ‘730 as applied to claim 9 above, and further in view of Akutsu et al. (US2018/0218990A1) (hereafter Akutsu).
With respect to claim 17, Akai and KR ‘730 do not teach wherein a distance between the recesses adjacent to each other is 0.1 times or more the average particle diameter of the solder particles.
However, Akutsu teaches wherein a distance between the recesses adjacent to each other is 0.1 times or more the average particle diameter of the solder particles (figures 3 and 6; and paragraphs 41 and 92).
At the time of filing the claimed invention it would have been obvious to one of ordinary skill in the art to utilize the pitch of Akutsu in the collective process of Akai and KR ‘730 in order to form an electronic device having the desired scale and pitch.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KILEY SHAWN STONER whose telephone number is (571)272-1183. The examiner can normally be reached on Monday-Thursday.
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/KILEY S STONER/ Primary Examiner, Art Unit 1735