Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “top plate”, “gas diffusion chamber” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-25, 31-34 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1, 4, and 6 of copending Application No. 18121611 (reference application, US 20230215700 A1). Although the claims at issue are not identical, they are not patentably distinct from each other because it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to optimize the processing temperature for the claimed invention.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-7, 12, 13, 18-25 are rejected under 35 U.S.C. 103 as being unpatentable over Umezawa; Yoshihiro et al. (US 20180337025 A1) in view of Elers; Kai-Erik (US 20100099264 A1). Umezawa teaches a capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) plasma processing apparatus (Figure 1), comprising: a chamber (12; Figure 1); a substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]) configured to support, in the chamber (12; Figure 1), a substrate (W; Figure 1) that includes a silicon-containing film and a mask (MSK; [0061]); , the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]) including a lower electrode (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); an upper electrode (142A,B; Figure 1,5) located above the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); a first gas supply (14b; Figure 1; [0041]; “one or more gas sources”; [0057]); a second gas supply (14b; Figure 1; [0066] - “may include an electron donating gas”, “one or more gas sources”-[0057]);a third gas supply to supply source (14a,b; Figure 1; [0041]; “one or more gas sources”; [00057]) of CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]); a plasma generator (22; Figure 1; [0050]) connected to the lower electrode (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); and a control circuitry (Cnt; Figure 1; [0052]) configured to control the first gas supply (14b; Figure 1; [0041]; “one or more gas sources”; [0057]) to supply a source (14a,b; Figure 1; [0041]; “one or more gas sources”; [00057]) of hydrogen fluoride (HF “second processing gas”; [0066]; 14b; Figure 1) (HF) gas (HF “second processing gas”; [0066]; 14b; Figure 1) into the chamber (12; Figure 1),control the second gas supply (14b; Figure 1; [0066] - “may include an electron donating gas”, “one or more gas sources”-[0057]) to supply a source (14a,b; Figure 1; [0041]; “one or more gas sources”; [00057]) of phosphorus gas (“electron donating gas”; [0066] - PF3) into the chamber (12; Figure 1), and control the plasma generator (22; Figure 1; [0050]) to generate, in the chamber (12; Figure 1), a plasma from a process gas including the HF gas (HF “second processing gas”; [0066]; 14b; Figure 1), the phosphorus gas (“electron donating gas”; [0066] - PF3) and the CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]) so as to etch the silicon-containing film – claim 1. The above and below italicized text is considered intended use requirements for the pending apparatus claims. Further, it has been held that claim language that simply specifies an intended use or field of use for the invention generally will not limit the scope of a claim (Walter , 618 F.2d at 769, 205 USPQ at 409; MPEP 2106). Additionally, in apparatus claims, intended use must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim (In re Casey,152 USPQ 235 (CCPA 1967); In re Otto , 136 USPQ 458, 459 (CCPA 1963); MPEP2115).
Umezawa further teaches:
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 1, wherein the mask (MSK; [0061]) comprises a metal material including at least one selected from titanium nitride, tungsten, and tungsten carbide, as claimed by claim 2
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 1, wherein the phosphorus gas (“electron donating gas”; [0066] - PF3) includes a phosphorus component selected from the group consisting of PF3, PCI3, PF5, PCI5, POCI3, PH3, PBr3, and PBr5, as claimed by claim 3
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 1, wherein the phosphorus gas (“electron donating gas”; [0066] - PF3) includes a fluorine component, as claimed by claim 4
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 4, wherein the phosphorus gas (“electron donating gas”; [0066] - PF3) includes PF3 or PF5, as claimed by claim 5
A capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) plasma processing apparatus (Figure 1), comprising: a chamber (12; Figure 1); a substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]) configured to support a substrate (W; Figure 1) that includes a silicon-containing film and a mask (MSK; [0061]) in the chamber (12; Figure 1), the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]) including a lower electrode (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); an upper electrode (142A,B; Figure 1,5) located above the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); a first gas supply (14b; Figure 1; [0041]; “one or more gas sources”; [0057]);a second gas supply (14b; Figure 1; [0066] - “may include an electron donating gas”, “one or more gas sources”-[0057]);a plasma generator (22; Figure 1; [0050]) connected to the lower electrode (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); and control circuitry (Cnt; Figure 1; [0052]) configured to: control the first gas supply (14b; Figure 1; [0041]; “one or more gas sources”; [0057]) to supply a source (14a,b; Figure 1; [0041]; “one or more gas sources”; [00057]) of hydrogen fluoride (HF “second processing gas”; [0066]; 14b; Figure 1) (HF) gas (HF “second processing gas”; [0066]; 14b; Figure 1) into the chamber (12; Figure 1),control the second gas supply (14b; Figure 1; [0066] - “may include an electron donating gas”, “one or more gas sources”-[0057]) to supply a source (14a,b; Figure 1; [0041]; “one or more gas sources”; [00057]) of CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]) into the chamber (12; Figure 1), and control the plasma generator (22; Figure 1; [0050]) to generate, in the chamber (12; Figure 1), a plasma from the HF gas (HF “second processing gas”; [0066]; 14b; Figure 1) and the CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]) so as to etch the silicon-containing film – claim 12
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 12, wherein the mask (MSK; [0061]) comprises a metal material including at least one selected from titanium nitride, tungsten, and tungsten carbide, as claimed by claim 13
A capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) plasma processing apparatus (Figure 1) for etching a substrate (W; Figure 1) in a chamber (12; Figure 1) of a plasma processing apparatus (Figure 1), the substrate (W; Figure 1) including a silicon-containing film and a mask (MSK; [0061]) on the silicon-containing film, comprising: a chamber (12; Figure 1); a substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]) in the chamber (12; Figure 1), the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]) including a lower electrode (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); an upper electrode (142A,B; Figure 1,5) located above the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); a plasma generator (22; Figure 1; [0050]) connected to the lower electrode (18; Figure 1,7,8-powered by 22; Figure 1; [0050]); a gas supply pipe (piping between 14a,b and 12; Figure 1) for providing a process gas to the chamber (12; Figure 1) through at least one flow control circuitry (“flow-rate control circuitrys, and one or more valves..”; [0057]; Cnt; Figure 1; [0052]) and at least one valve; and control circuitry (Cnt; Figure 1; [0052]) configured to: controllably provide the process gas to the chamber (12; Figure 1) via the at least one flow control circuitry (“flow-rate control circuitrys, and one or more valves..”; [0057]; Cnt; Figure 1; [0052]) and the at least one valve, and etch the silicon-containing film with a chemical species in a plasma generated from the process gas, wherein the process gas contains a hydrogen fluoride (HF “second processing gas”; [0066]; 14b; Figure 1) gas and a CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]) – claim 18
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 18, wherein the process gas further contains a phosphorus gas (“electron donating gas”; [0066] - PF3), as claimed by claim 19
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim l 9, wherein the phosphorus gas (“electron donating gas”; [0066] - PF3) includes a phosphorus component selected from the group of PF3, PCI3, PF5, PC15, POCl3, PH3,PBr3, and PBr5, as claimed by claim 20
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 18, further comprising: a chiller (76; Figure 1; [0098]) to supply a heat exchange medium into a flow channel (72,74; Figure 1; [0098]) in the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]), wherein the control circuitry (Cnt; Figure 1; [0052]) is further configured to control the chiller (76; Figure 1; [0098]) to supply the heat exchange medium into the flow channel (72,74; Figure 1; [0098]) – claim 25
Umezawa does not teach:
control the third gas supply (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]) to supply a source (14a,b; Figure 1; [0041]; “one or more gas sources”; [00057]) of CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]) into the chamber (12; Figure 1), where x and z are integers greater than or equal to 1, and y is an integer greater than or equal to 0 – claim 1
a CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]), where x and z are integers greater than or equal to 1, and y is an integer greater than or equal to 0 – claim 12, 18
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 18, wherein the process gas further contains a halogen-containing gas other than the hydrogen fluoride (HF “second processing gas”; [0066]; 14b; Figure 1) gas and the CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]), as claimed by claim 21
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 21, wherein the halogen-containing gas contains at least one gas selected from the group consisting of a chlorine-containing gas, the bromine-containing gas and the iodine-containing gas, as claimed by claim 22
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 21, wherein the halogen-containing gas contains at least one gas selected from the group consisting of Cl2 gas, HCl gas and HBr gas, as claimed by claim 23
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 18, wherein the process gas further contains a carbon-containing gas other than the CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]), as claimed by claim 24
set the temperature of the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]) to a temperature of 0 °C. or less before generating the plasma – claim 25
Elers also teaches halide source gases ([0060]) including Cl2, HCl, Br2 and CxFyBrz gas (x=1,y=0,z=4; CBr4) where x and z are integers greater than or equal to 1, and y is an integer greater than or equal to 0 used in a plasma reactor system (Figure 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Umezawa to add / replace additional process gases as taught by Elers at optimized operating temperatures.
Motivation for Umezawa to add / replace additional process gases as taught by Elers at optimized operating temperatures is for “any suitable material that will transfer one or more halide atoms” as taught by Elers ([0060]) under the desired reactions described by Umezawa ([0066]).
Claims 8-11 and 14-17 are rejected under 35 U.S.C. 103 as being unpatentable over Umezawa; Yoshihiro et al. (US 20180337025 A1) and Elers; Kai-Erik (US 20100099264 A1) in view of Makino; Hiroyuki et al. (US 20110097510 A1). Umezawa and Elers are discussed above.
Umezawa further teaches:
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 1, further comprising: a bias source (22a; Figure 1; [0050]) to apply a pulsed (Figure 3; [0050]) DC voltage to the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]) - claim 10
Umezawa and Elers do not teach:
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 1, further comprising: a bias source (22a; Figure 1; [0050]) to provide a pulsed (Figure 3; [0050]) bias radio frequency (RF) power to the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]), as claimed by claim 8
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 8, wherein each cycle of the pulsed (Figure 3; [0050]) bias RF power comprises a first period and a second period, the pulsed (Figure 3; [0050]) bias RF power has a first power level during the first period, and a second power level during the second period, the second power level is different from the first power level, as claimed by claim 9
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 1, further comprising: a bias source (22a; Figure 1; [0050]) to apply a pulsed (Figure 3; [0050]) negative DC voltage to the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]), as claimed by claim 10
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 10, wherein each cycle of the pulsed (Figure 3; [0050]) negative DC voltage comprises a first period and a second period, the pulsed (Figure 3; [0050]) negative DC voltage has a first voltage level during the first period, and a second voltage level during the second period, the second voltage level is different from the first voltage level, as claimed by claim 11
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 12, further comprising: a bias source (22a; Figure 1; [0050]) to provide a pulsed (Figure 3; [0050]) bias radio frequency (RF) power to the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]), as claimed by claim 14
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 14, wherein each cycle of the pulsed (Figure 3; [0050]) bias RF power comprises a first period and a second period, the pulsed (Figure 3; [0050]) bias RF power has a first power level during the first period, and a second power level during the second period, the second power level is different from the first power level, as claimed by claim 15
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 12, further comprising: a bias source (22a; Figure 1; [0050]) to apply a pulsed (Figure 3; [0050]) negative DC voltage to the substrate support (18; Figure 1,7,8-powered by 22; Figure 1; [0050]), as claimed by claim 16
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 16, wherein each cycle of the pulsed (Figure 3; [0050]) negative DC voltage comprises a first period and a second period, the pulsed (Figure 3; [0050]) negative DC voltage has a first voltage level during the first period, and a second voltage level during the second period, the second voltage level is different from the first voltage level, as claimed by claim 17
Makino teaches an RF or DC pulsed power source (70; Figure 1; [0035]) in a plasma processing chamber (10; Figure 1) including:
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 1, further comprising: a bias source (100, 70; Figure 1; [0035]) to provide a pulsed (Figure 3,5) bias radio frequency (RF) power to the substrate support (60; Figure 1), as claimed by claim 8
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 8, wherein each cycle of the pulsed (Figure 3,5) bias RF power comprises a first period (t1; Figure 3,5) and a second period (t2; Figure 3,5), the pulsed (Figure 3,5) bias RF power has a first power level (V-; Figure 3,5) during the first period (t1; Figure 3,5), and a second power level (V+; Figure 3,5) during the second period (t2; Figure 3,5), the second power level (V+; Figure 3,5) is different from the first power level (V-; Figure 3,5), as claimed by claim 9
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 1, further comprising: a bias source (100, 70; Figure 1; [0035]) to apply a pulsed (Figure 3,5) negative DC voltage (AC,DC-[0035]) to the substrate support (60; Figure 1), as claimed by claim 10
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 10, wherein each cycle of the pulsed (Figure 3,5) negative DC voltage (AC,DC-[0035]) comprises a first period (t1; Figure 3,5) and a second period (t2; Figure 3,5), the pulsed (Figure 3,5) negative DC voltage (AC,DC-[0035]) has a first voltage level (V-; Figure 3,5) during the first period (t1; Figure 3,5), and a second voltage level (V+; Figure 3,5) during the second period (t2; Figure 3,5), the second voltage level (V+; Figure 3,5) is different from the first voltage level (V-; Figure 3,5), as claimed by claim 11
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 12, further comprising: a bias source (100, 70; Figure 1; [0035]) to provide a pulsed (Figure 3,5) bias radio frequency (RF) power to the substrate support (60; Figure 1), as claimed by claim 14
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 14, wherein each cycle of the pulsed (Figure 3,5) bias RF power comprises a first period (t1; Figure 3,5) and a second period (t2; Figure 3,5), the pulsed (Figure 3,5) bias RF power has a first power level (V-; Figure 3,5) during the first period (t1; Figure 3,5), and a second power level (V+; Figure 3,5) during the second period (t2; Figure 3,5), the second power level (V+; Figure 3,5) is different from the first power level (V-; Figure 3,5), as claimed by claim 15
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 15, further comprising: a bias source (100, 70; Figure 1; [0035]) to apply a pulsed (Figure 3,5) negative DC voltage (AC,DC-[0035]) to the substrate support (60; Figure 1), as claimed by claim 16
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) processing apparatus (Figure 1) of claim 16, wherein each cycle of the pulsed (Figure 3,5) negative DC voltage (AC,DC-[0035]) comprises a first period (t1; Figure 3,5) and a second period (t2; Figure 3,5), the pulsed (Figure 3,5) negative DC voltage (AC,DC-[0035]) has a first voltage level (V-; Figure 3,5) during the first period (t1; Figure 3,5), and a second voltage level (V+; Figure 3,5) during the second period (t2; Figure 3,5), the second voltage level (V+; Figure 3,5) is different from the first voltage level (V-; Figure 3,5), as claimed by claim 17
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Umezawa to add Makino’s DC/RF power pulsing means as taught by Makino.
Motivation for Umezawa to add Makino’s DC/RF power pulsing means as taught by Makino is for processing uniformity as taught by Makino ([0023]-[0024]).
Claims 31-32, 34 are rejected under 35 U.S.C. 103 as being unpatentable over Umezawa; Yoshihiro et al. (US 20180337025 A1) and Elers; Kai-Erik (US 20100099264 A1) in view of Sano; Atsushi et al. (US 20080264337 A1). Umezawa and Elers are discussed above. Umezawa and Elers do not teach:
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) plasma processing apparatus of claim 1, wherein the control circuitry (Cnt; Figure 1; [0052]) is configured to supply the source (14a,b; Figure 1; [0041]; “one or more gas sources”; [00057]) of CxFyBrz gas into the chamber in a stepwise manner, as claimed by claim 31
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) plasma processing apparatus of claim 1, wherein the control circuitry (Cnt; Figure 1; [0052]) is configured to decrease the pressure in the chamber in a stepwise manner during etching, as claimed by claim 32
The capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) plasma processing apparatus of claim 12, wherein the control circuitry (Cnt; Figure 1; [0052]) is configured to supply the source (14a,b; Figure 1; [0041]; “one or more gas sources”; [00057]) of CxFyBrz gas into the chamber in a stepwise manner, as claimed by claim 34
Sano also teaches a plasma wafer processing system (Figure 3) with control circuitry (256; Figure 3) configured to pulse inject precursors (“activated gas” O2; [0051]; Figure 4) and decrease the pressure in the chamber (Figure 4) in a stepwise manner (Figure 4) during etching (“activated gas” O2; [0051]; Figure 4).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Umezawa to add Sano’s control circuitry (256; Figure 3) to Umezawa’s apparatus.
Motivation for Umezawa to add Sano’s control circuitry (256; Figure 3) to Umezawa’s apparatus is “…foreign matter can be prevented from being adsorbed on the substrate” as taught by Sano (abstract, etc..).
Claim 33 is rejected under 35 U.S.C. 103 as being unpatentable over Umezawa; Yoshihiro et al. (US 20180337025 A1) and Elers; Kai-Erik (US 20100099264 A1) in view of Paterson; Alexander et al. (US 20070246161 A1). Umezawa and Elers are discussed above. Umezawa further teaches Umezawa’s capacitively coupled (via 18,22; Figure 1-DC bias,HF; [0050]) plasma processing apparatus of claim 1, wherein Umezawa’s upper electrode (142A,B; Figure 1,5) includes a top plate (194; Figure 5) and a support (164A; Figure 5).
Umezawa does not teach Umezawa’s top plate (194; Figure 5) has a plurality of gas discharge holes passing through in a thickness direction; and Umezawa’s support (164A; Figure 5) includes a gas diffusion chamber (assumed to be “gas-diffusion compartment 36a”) and a plurality of gas holes, each of the plurality of gas holes communicating with a respective one of the plurality of gas discharge holes.
Paterson also teaches both a capacitive (116; Figure 24; [0034]) and inductive (190; Figure 24; [0034]) plasma system (Figure 24).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Umezawa to add Paterson’s capacitive plasma electrode (116; Figure 24).
Motivation for Umezawa to add Paterson’s capacitive plasma electrode (116; Figure 24) is for “…promoting less dissociation and a center high radial ion distribution…and provides greater ion density …” as taught by Paterson ([0035]).
Response to Arguments
Applicant's arguments filed March 5, 2026 have been fully considered but they are not persuasive.
Applicant states:
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Firstly, Applicant respectfully submits that the rejections of the claims is improper. The Office Action asserts that Umezawa discloses: "--a plasma from the HF gas (HF "second processing gas" ; [0066]; 14b; Figure 1), the phosphorous gas ( "electron donating gas" ; [0066] - PF3) and the CxFyBrz gas (14a; Figure 1; "one or more gas sources" -[0057]; CF4; [0065], x=1, y=4, z=0; "one or more gas sources " -[0057]) so as to etch the silicon-containing film - claim 1."
However, Umezawa relates to etching technology for MRAM elements. In paragraphs [0059]-[0061] and [0065]-[0067] of Umezawa cited in the Office Action, the HF gas and other gases are used to remove deposits generated from etching metals or metal compounds, such as CoFeB and MgO. Applicant respectfully submits that there is neither description nor suggestion in Umezawa that HF gas or the like is used for etching silicon-containing films. Moreover, paragraph [0112] of Umezawa mentions etching of an insulating layer (IL) such as a silicon nitride film or silicon oxide film, but it only states that a processing gas containing hydrofluorocarbon gas or fluorocarbon gas is used in the etching.
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In response, the argued “used for etching silicon-containing films” is an intended use argument without adding any purported structural distinction in the pending apparatus claims. As noted above, the italicized text is considered intended use requirements for the pending apparatus claims. Further, it has been held that claim language that simply specifies an intended use or field of use for the invention generally will not limit the scope of a claim (Walter , 618 F.2d at 769, 205 USPQ at 409; MPEP 2106). Additionally, in apparatus claims, intended use must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim (In re Casey,152 USPQ 235 (CCPA 1967); In re Otto , 136 USPQ 458, 459 (CCPA 1963); MPEP2115).
Applicant states:
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Further, independent claims 1, 12 and 18 have been amended to recite "an upper electrode located above the substrate support," which is supported by inter alia FIG. 3 and the corresponding description. Applicant respectfully submits that Umezawa fails to teach or suggest the limitations of independent claims 1, 12 and 18.
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In response, the Examiner’s new grounds of rejection address the newly amended limitation.
Applicant states:
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Umezawa addresses the problem of non-uniform etching rates when etching MRAM elements using a conventional apparatus as shown in Patent Document 1 (JP2012204408A) (Umezawa [0005]). To solve this problem, Umezawa describes that "In this method, since a plurality of inclined rotation states having different inclination angles of the workpiece and process times can be implemented in combination during the execution of etching , it is possible to sufficiently improve the uniformity of the etching rate for the workpiece by adjusting the combination ." (Umezawa [0006] to [0012]). From the foregoing, Umezawa is directed to the technology of the plasma processing apparatus as shown in Figure 1.
For instance, since Umezawa's plasma processing apparatus includes a plasma source 16 having a high-frequency antenna 140 and a shield member 160, and the high-frequency antenna 140 includes an inner antenna element 142A and an outer antenna element 142B, Umezawa is an inductive plasma processing apparatus that cannot be applied to the capacitive plasma processing apparatus of the claims.
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In response, the Examiner’s above new grounds of rejection note that Umezawa teaches both a capacitive plasma source (via 18,22; Figure 1-DC bias,HF; [0050]) and an inductive plasma source via upper electrode (142A,B; Figure 1,5). Applicant’s claims do not exclude such a structure as taught by Umezawa.
Applicant states:
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Therefore, it is not possible to replace the plasma processing apparatus shown in Figure 1 of Umezawa with the capacitively coupled plasma processing apparatus as in the present invention. Such a modification would prevent Umezawa from achieving the problem it seeks to solve [In re Gordon, 733 F.2d 900, 221 USPQ 1125 (Fed. Cir. 1984)]. Moreover, since Umezawa proposes the apparatus shown in Figure 1 to replace the apparatus that cannot change the tilt angle of the object during the etching process, there is a teaching away from modifying the apparatus of Figure 1 to be as recited in the amended claim 1.
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In response, the Examiner’s notes that the only claimed feature keeping Umezawa from an anticipation rejection of all the independent claims is only Umezawa’s source of CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]), where x and z are integers greater than or equal to 1, and y is an integer greater than or equal to 0 – claim 1 and a CxFyBrz gas (14a; Figure 1; “one or more gas sources”-[0057]; CF.sub.4 ; [0065], x=1,y=4,z=0; “one or more gas sources”-[0057]), where x and z are integers greater than or equal to 1, and y is an integer greater than or equal to 0 – claim 12, 18.
Applicant states:
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The present invention does not merely use a bromine-containing carbon gas as an interchangeable halide source. Rather, the CxFyBrz gas (z>1) plays a specific and non-obvious role in the claimed process: it generates a carbon-containing protective deposit (DPC) on the sidewalls of the silicon-containing film during etching, which simultaneously (a) reduces bowing, (b) improves etch verticality, and (c) enables very high selectivity of the silicon film to the metal mask (up to ~14x per FIG. 10 of the specification). The bromine component of the gas provides a distinct chemical environment that is different from pure fluorocarbon (CxFy) chemistry.
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And…
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This specific synergy-HF as etchant, phosphorus gas to protect the mask, and CxFyBrz (z>1) to provide carbon-based sidewall protection with bromine-enhanced selectivity-is nowhere described, suggested, or implied in either Umezawa or Elers. The Examiner does not explain why a POSITA would have had any reason to expect that substituting or adding a bromine-containing carbon gas into Umezawa's process would produce this result. Without a reasonable expectation of success in achieving the claimed advantages, the combination is impermissible. Pfizer, Inc. v. Apotex, Inc., 480 F.3d 1348, 1361 (Fed. Cir. 2007).
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And..
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Umezawa specifically identifies CF4 as a fluorocarbon-based etching gas ([0065]) and the electron-donating gas as PF3 ([0066]). Umezawa's disclosed chemistry is built around fluorine-dominated cryogenic etching. Importantly, Umezawa describes the desired reactions in terms of fluorine-containing species forming volatile silicon fluoride reaction products ([0066]). Bromine chemistry operates by different mechanisms-bromine-containing radicals are less volatile at cryogenic temperatures and interact differently with silicon surfaces. There is nothing in Umezawa suggesting that adding a bromine-containing carbon source is desirable, beneficial, or even compatible with the cryogenic fluorine-dominated process Umezawa describes.
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In response, Applicant’s October 8, 2025 election of pending apparatus claims 1-25 without traverse is recorded. The Examination of the pending apparatus claims are examined under an intended use interpretation as noted above. Process or intended use limitations not recited under a controller’s functional descriptive language is considered intended use. Notably, the Examiner has addressed Applicant’s process limitations recited under the claimed “control circuitry”.
Applicant states:
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Where a reference "teaches away" from a combination-meaning it suggests that the modification would be undesirable or lead away from the claimed invention-the motivation to combine is absent. DePuy Spine, Inc. v. Medtronic SofamorDanek, Inc., 567 F.3d 1314, 1326 (Fed. Cir. 2009). Umezawa's specific focus on fluorine-based chemistry without any bromine- containing species constitutes teaching away from the introduction of CxFyBrz (z>1) gases into its process.
For the reasons set forth above, Umezawa fails to teach or suggest the limitations of independent claims 1, 12 and 18. Further, no reference relied upon remedies the deficiencies of Umezawa . Accordingly, it is submitted that independent claims 1, 12 and 18 and each of the claims depending therefrom are allowable.
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As stated above, Applicant’s arguments are directed to process limitations that are not presently claimed, as argued above, under any pending method claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Etching gas recipes for plasma reactors include Yokoyama; Takahiro et al. (US 20210143016 A1), US 5126169 A, US 20150126031 A1, US 20210343539 A1, US 20210159089 A1
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Examiner Rudy Zervigon whose telephone number is (571) 272- 1442. The examiner can normally be reached on a Monday through Thursday schedule from 8am through 6pm EST. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Any Inquiry of a general nature or relating to the status of this application or proceeding should be directed to the Chemical and Materials Engineering art unit receptionist at (571) 272-1700. If the examiner cannot be reached please contact the examiner's supervisor, Parviz Hassanzadeh, at (571) 272- 1435.
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/Rudy Zervigon/ Primary Examiner, Art Unit 1716
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