DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/29/2025 and 04/10/2026 the submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC §101 non-transitory computer-readable medium
Claims 12-13 are rejected under 35 U.S.C. 101 because the claimed invention is not directed to patent eligible subject matter. Based upon consideration of all of the relevant factors with respect to the claim as a whole, claim(s) 12 is determined to be directed to an abstract idea. The rationale for this determination is explained below: The computer readable medium requires the limitation non-transitory for the claim to fulfill the requirements of 35 USC 101 (See MPEP 2106 II A(c)). If the applicant will amend the limitation to state: "A non-transitory computer-readable medium comprising instructions...” then the 101 rejections will be removed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3-6, and 8-13 are rejected under 35 U.S.C. 103 as being unpatentable over Chivite Zabalza et al. (US 2023/0123533) in view of Franz et al. (DE102016203190).
Regarding claim 1, Chivite Zabalza teaches A method of operating an electrical power system (see figure 1-5) for an aircraft, the electrical power system comprising: a semiconductor-based active power converter (fig. 3A@ converter 320 may also utilise another type of transistor, for example MOSFETs) (see par. [0011-0014] and [0068]); and a contactor (fig. 5A@ 352) coupled to and controllable by the semiconductor-based active power converter (320); an electrical device (fig. 3A@ electrical machine 310) and a DC bus (fig. 3A@ DC network 330); and wherein the semiconductor-based active power converter (320) is coupled between the DC bus (330), (see par. 0073]); the method comprising: in response to a determination that there is a fault within the electrical power system (see figure 4 and par. [0071-0075], the effect of a DC network fault (e.g., a fault in a load connected in the DC network which places a low impedance across the DC network terminals) on the operation of the electrical power system).
However, Chivite Zabalza does not explicitly teach the semiconductor-based active power converter is coupled between the DC bus and the electrical device via the contactor, operating in a fault mode which includes: maintaining the semiconductor-based active power converter in a blocked configuration; the semiconductor-based active power converter is coupled the electrical device via the contactor; and subsequently causing the contactor to be opened.
Franz teaches a contactor (see fig. 2@ contactor SZ) coupled to and controllable by the semiconductor-based active power converter (fig. 2@ GW), (see figure 2) is coupled between the DC bus (fig. 2: DC bus is connected to ZK) and the electrical device (EM, LE) via the contactor (SZ); and operating in a fault mode (see par. [0079], if an overcurrent or an overvoltage is determined, the measuring arrangement MS emits a corresponding signal to the control arrangement ST connected downstream) which includes: maintaining the semiconductor-based active power converter in a blocked configuration (see par. [0080] with a control signal, the control arrangement ST controls the gate driver GT in such a way that it opens the (positive-voltage-side) semiconductor switch HS1, the load current path of which runs through the current path SP 2. By opening the semiconductor switch HS1, the current flow through the second current path SP2 is interrupted); the semiconductor-based active power converter (HS1 and HS2) is coupled the electrical device (fig. 1@ LE) via the contactor (SZ); and subsequently causing the contactor to be opened (see par. [0081 ], With the other control signal, the control arrangement ST opens the (high-voltage) contactor SZ, so that the electrical connection is galvanically isolated via the first current path SP1).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Chivite Zabalza with the teachings of Franz by having operating in a fault mode which includes: maintaining the semiconductor-based active power converter in a blocked configuration; the semiconductor-based active power converter is coupled the electrical device via the contactor; and subsequently causing the contactor to be opened in order to opening the mechanical contactor ensures complete galvanic isolation of the electrical device from the converter. This protects both the converter and the isolated load from residual voltages, leakage currents, or subsequent systemic faults, providing ultimate safety for maintenance and equipment longevity.
Regarding claim 3, the combination teaches wherein operating in the fault mode includes: subsequent to maintaining the converter in the blocked configuration and prior to causing the contactor to be opened, maintaining the converter in a crow-bar configuration (see par. [0023], [0026] and [0080], Controlling switching of the transistors of the converter to control the level of current supplied to the DC electrical network may comprise: switching the transistors of the converter to a crow-bar configuration in which current from the electrical machine does not flow to the DC network; Chivite Zabalza).
Regarding claim 4, the combination teaches the electrical device (310) is an AC electrical machine (an electrical machine 310); and the semiconductor-based active power converter (320) is coupled to the DC bus (330) via the contactor (see par. [0106], after controlling the current level at step 15, the controller 340 controls the state of one or more circuit breaking components (e.g., contactors) in the DC network 330. For example, the controller 340 may open a DC contactor to isolate a fault from the remainder of the DC network 330; Chivite Zabalza).
Regarding claim 5, the combination teaches wherein the AC electrical machine is a motor, a generator or a motor-generator (see figure 2A and par. [0057], the propulsion system 200 includes a generator set 202 comprising an engine 201 and electrical generator 211; Chivite Zabalza).
Regarding claim 6, the combination teaches wherein the electrical device includes an energy storage device (fig. 1@ high-voltage battery unit BE), (see par. [0060]; Franz).
Regarding claim 8, the combination teaches wherein; the semiconductor-based active power converter (320) is one of a plurality of semiconductor-based active power converters (see par. [0002]) of the electrical power system; the contactor (352) is one of a plurality of contactors of the electrical power system, each contactor (352) being coupled to and controllable by a respective one of the semiconductor-based active power converters (320); and operating in the fault mode (see figure 4 and par. [0071-0075], the effect of a DC network fault (e.g., a fault in a load connected in the DC network which places a low impedance across the DC network terminals; Chivite Zabalza) includes: maintaining at least one of the semiconductor-based active power converters in the blocked configuration (see par. [0080] with a control signal, the control arrangement ST controls the gate driver GT in such a way that it opens the (positive-voltage-side) semiconductor switch HS1, the load current path of which runs through the current path SP 2. By opening the semiconductor switch HS1, the current flow through the second current path SP2 is interrupted; Franz); and subsequently causing the contactor coupled to the at least one semiconductor-based active power converter to be opened (see par. [0081 ], With the other control signal, the control arrangement ST opens the (high-voltage) contactor SZ, so that the electrical connection is galvanically isolated via the first current path SP1; Franz).
Regarding claim 9, the combination teaches An electrical power system (see figure 2; Franz) comprising: a semiconductor-based active power converter (GW); a contactor (SZ) coupled to and controllable by the semiconductor-based active power converter (GW); an electrical device (EM, LE) and a DC bus (BE); and wherein the semiconductor-based active power converter (GW) is coupled between the DC bus (BE) and the electrical device (EM, LE) via the contactor (SZ); and a controller (ST) configured to carry out the method of claim 1, (see figure 2; Franz).
Regarding claim 10, the combination teaches wherein the semiconductor-based active power converter (GW) comprises the controller (ST), (see figure 2; Franz).
Regarding claim 11, the combination teaches An aircraft comprising the electrical power system (see figure 3A and par. [0065], an electrical power system 300 such as may be used in the aircraft and engine systems; Chivite Zabalza).
Regarding claim 12, the combination teaches A computer program (see figure 3A@ controller 340) comprising instructions (see figure 9) to cause the controller (340) of the electrical power system (300) of claim 9 to carry out the method of operating the electrical power system for the aircraft, the electrical power system comprising: the semiconductor-based active power converter (320); and the contactor (fig. 5A@ 352) coupled to and controllable by the semiconductor-based active power converter (320); the electrical device (310) and the DC bus (328); and wherein the semiconductor-based active power converter (320) is coupled between the DC bus (328) and the electrical device via the contactor (352); the method comprising: in response to the determination that there is the fault within the electrical power system, operating in the fault mode (par. [0071-0075], the effect of a DC network fault (e.g., a fault in a load connected in the DC network which places a low impedance across the DC network terminals) on the operation of the electrical power system), (see par. [0097-0106]; Chivite Zabalza) which includes: maintaining the semiconductor-based active power converter in the blocked configuration (par. [0080] with a control signal, the control arrangement ST controls the gate driver GT in such a way that it opens the (positive-voltage-side) semiconductor switch HS1, the load current path of which runs through the current path SP 2. By opening the semiconductor switch HS1, the current flow through the second current path SP2 is interrupted; Franz); and subsequently causing the contactor to be opened (par. [0081 ], With the other control signal, the control arrangement ST opens the (high-voltage) contactor SZ, so that the electrical connection is galvanically isolated via the first current path SP1; Franz).
Regarding claim 13, the combination teaches A computer-readable (see figure 5A@ 340; Chivite Zabalza) medium having stored thereon the computer program (see figure 9; Chivite Zabalza), (see par. [0097-0106]; Chivite Zabalza).
Claims 2 is rejected under 35 U.S.C. 103 as being unpatentable over Chivite Zabalza et al. (US 2023/0123533) in view of Franz et al. (DE102016203190) and further in view of Gupta et al. (US 2018/0366942).
Regarding claim 2, the combination teaches the method above, but does not explicitly teach wherein operating in the fault mode includes: monitoring a magnitude of an electrical current through a conduction pathway which includes the contactor; and causing the contactor to be opened when the monitored magnitude is lower than a threshold value.
Gupta teaches operating in the fault mode includes: monitoring a magnitude of an electrical current through a conduction pathway which includes the contactor; and causing the contactor to be opened when the monitored magnitude is lower than a threshold value (see claims 1-3; monitoring a DC fault condition; determining if a breaker switch operation condition is met; and when the breaker switch operation condition is met, opening the breaker switch).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Chivite Zabalza and Franz with the teachings of Gupta by having operating in the fault mode includes: monitoring a magnitude of an electrical current through a conduction pathway which includes the contactor; and causing the contactor to be opened when the monitored magnitude is lower than a threshold value in order to tracking current levels and opening the contactor when the magnitude falls below a specific threshold, it automatically isolates compromised circuits. This actively mitigates electrical shock hazards, prevents arcing risks, and protects against equipment damage from severe current drops or faults.
Claims 7 is rejected under 35 U.S.C. 103 as being unpatentable over Chivite Zabalza et al. (US 2023/0123533) in view of Franz et al. (DE102016203190) and further in view of Tesch (US 2025/0379459).
Regarding claim 7, the combination teaches the method above, but does not explicitly teach wherein the electrical system further comprises a fuse coupled between the semiconductor-based active power converter and the energy storage device.
Tesch teaches the electrical system (see figure 4) comprises a fuse (fig. 4@ fuses 425, 430) coupled between the semiconductor-based active power converter (fig. 4@ 130) and the energy storage device (fig. 4@ 410).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Chivite Zabalza and Franz with the teachings of Tesch by having a fuse coupled between the semiconductor-based active power converter and the energy storage device in order to provide a secure visual and electrical break, which safely isolates the battery or capacitor bank for hardware maintenance.
Conclusion
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/XUAN LY/Examiner, Art Unit 2836
/REXFORD N BARNIE/Supervisory Patent Examiner, Art Unit 2836
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