Prosecution Insights
Last updated: October 22, 2026
Application No. 19/313,558

SEMICONDUCTOR PROCESSING SYSTEMS AND ASSOCIATED METHODS FOR FORMING SUPER-LATTICE STRUCTURES USING SEMICONDUCTOR PROCESSING SYSTEMS

Non-Final OA §103§112
Filed
Aug 28, 2025
Priority
Aug 30, 2024 — provisional 63/689,111
Examiner
ZERVIGON, RUDY
Art Unit
1716
Tech Center
1700 — Chemical & Materials Engineering
Assignee
ASM IP Holding B.V.
OA Round
1 (Non-Final)
67%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
Est. Remaining
62%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
724 granted / 1082 resolved
+1.9% vs TC avg
Minimal -5% lift
Without
With
+-5.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
32 currently pending
Career history
1121
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
50.6%
+10.6% vs TC avg
§102
28.7%
-11.3% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1082 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-15 in the reply filed on July 16, 2026 is acknowledged. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 12 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 12 requires, in part, “…and a vacuum pump coupled to the exhaust flange and therethrough to the remote plasma unit …”. The “and therethrough” is indefinite with respect to the other claimed components. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 4-12 are rejected under 35 U.S.C. 103 as being unpatentable over Kilpela, Olli et al. (US 20030075273 A1) in view of AmRhein, Frederick J. et al. (US 20050221618 A1). Kilpela teaches a semiconductor processing system (Figure 4A), comprising:a chamber body (100; Figure 4A; [0041],[0049]) having an upper wall (68; Figure 4A; [0041],[0049]) and a lower wall (70; Figure 4A; [0041],[0049]), wherein the upper wall (68; Figure 4A; [0041],[0049]) extends longitudinally between an injection end (60,62; Figure 4A; [0041],[0049]) and a longitudinally opposite exhaust end (66; Figure 4A; [0041],[0049]), and the lower wall (70; Figure 4A; [0041],[0049]) is below and parallel relative to the upper wall (68; Figure 4A; [0041],[0049]);a substrate support (58; Figure 4A; [0041],[0049]) configured to support a substrate and arranged within an interior of the chamber body (100; Figure 4A; [0041],[0049]) between the injection end (60,62; Figure 4A; [0041],[0049]) and the exhaust end (66; Figure 4A; [0041],[0049]);a first inlet (62; Figure 4A; [0042]) coupled to the chamber body (100; Figure 4A; [0041],[0049]) and configured for introducing a first vapor phase reactant into the chamber body (100; Figure 4A; [0041],[0049]);a second inlet (60; Figure 4A; [0042]) coupled to the chamber body (100; Figure 4A; [0041],[0049]) and separated from the first inlet (62; Figure 4A; [0042]); the second inlet (60; Figure 4A; [0042]) configured for introducing a plasma generated reactant into the chamber body (100; Figure 4A; [0041],[0049]); and an isolating member (67; Figure 3A,3B,4A; [0049]-Applicant’s 146; Figure 2) positioned between the first inlet (62; Figure 4A; [0042]) and the second inlet (60; Figure 4A; [0042]) and configured to isolate the first vapor phase reactant from the plasma generated reactant until the first vapor phase reactant and plasma generated reactant are proximate to the substrate support (58; Figure 4A; [0041],[0049]) – claim 1 Kilpela further teaches: The semiconductor processing system (Figure 4A) of claim 3, wherein the second inlet (60; Figure 4A; [0042]) is positioned between the injection flange and the substrate support (58; Figure 4A; [0041],[0049]), as claimed by claim 4 The semiconductor processing system (Figure 4A) of claim 4, wherein the second inlet (60; Figure 4A; [0042]) is disposed in the lower wall (70; Figure 4A; [0041],[0049]) of the chamber body (100; Figure 4A; [0041],[0049]), as claimed by claim 5 The semiconductor processing system (Figure 4A) of claim 5, wherein the isolating member (67; Figure 3A,3B,4A; [0049]-Applicant’s 146; Figure 2) extends into the interior of the chamber body (100; Figure 4A; [0041],[0049]) from the injection flange toward the substrate support (58; Figure 4A; [0041],[0049]), as claimed by claim 6 The semiconductor processing system (Figure 4A) of claim 7, wherein the isolating member (67; Figure 3A,3B,4A; [0049]-Applicant’s 146; Figure 2) is positioned a vertical distance above the substrate support (58; Figure 4A; [0041],[0049]), as claimed by claim 8 The semiconductor processing system (Figure 4A) of claim 8, wherein the isolating member (67; Figure 3A,3B,4A; [0049]-Applicant’s 146; Figure 2) is angled (Figure 3A) toward the substrate support (58; Figure 4A; [0041],[0049]), as claimed by claim 9 The semiconductor processing system (Figure 4A) of claim 9, wherein the precursor source includes a silicon precursor in fluid communication with a precursor inlet of the remote plasma unit (Applicant’s 104; Figure 2) and the plasma generated reactant comprises a plurality of energetic silicon species, as claimed by claim 10. Applicant’s claim is directed to intended use claim requirements for the pending apparatus claims. Further, it has been held that claim language that simply specifies an intended use or field of use for the invention generally will not limit the scope of a claim (Walter , 618 F.2d at 769, 205 USPQ at 409; MPEP 2106). Additionally, in apparatus claims, intended use must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim (In re Casey,152 USPQ 235 (CCPA 1967); In re Otto , 136 USPQ 458, 459 (CCPA 1963); MPEP2115). Kilpela does not teach: a remote plasma unit (Applicant’s 104; Figure 2) having a plasma outlet coupled to the second inlet (60; Figure 4A; [0042]) and configured to generate the plasma generated reactant by decomposition of a second vapor phase reactant – claim 1 The semiconductor processing system (Figure 4A) of claim 1, wherein the first inlet (62; Figure 4A; [0042]) comprises an injection flange connected to the injection end (60,62; Figure 4A; [0041],[0049]) of the chamber body (100; Figure 4A; [0041],[0049]), as claimed by claim 2 The semiconductor processing system (Figure 4A) of claim 6, wherein the isolating member (67; Figure 3A,3B,4A; [0049]-Applicant’s 146; Figure 2) comprises an opaque material, as claimed by claim 7 The semiconductor processing system (Figure 4A) of claim 10, wherein the remote plasma unit (Applicant’s 104; Figure 2) comprises an inductively coupled plasma source or a microwave plasma source, as claimed by claim 11 The semiconductor processing system (Figure 4A) of claim 11, further comprising an exhaust flange connected to the exhaust end (66; Figure 4A; [0041],[0049]) of the chamber body (100; Figure 4A; [0041],[0049]) and a vacuum pump coupled to the exhaust flange and therethrough to the remote plasma unit (Applicant’s 104; Figure 2), as claimed by claim 12 AmRhein also teaches a cross-flow reactor (Figure 1) including: a remote plasma unit (60; Figure 1-Applicant’s 104; Figure 2) having a plasma outlet coupled (61; Figure 1) to the second inlet (66; Figure 1) and configured to generate the plasma generated reactant by decomposition of a second vapor phase reactant – claim 1 The semiconductor processing system (Figure 1) of claim 1, wherein the first inlet (54; Figure 1) comprises an injection flange (50; Figure 1) connected to the injection end (40; Figure 1) of the chamber body (12; Figure 1; [0046]), as claimed by claim 2 The semiconductor processing system (Figure 1) of claim 6, wherein the isolating member (36 from 12; Figure 1; quartz; [0038]-Applicant’s 146; Figure 2) comprises an opaque material, as claimed by claim 7 The semiconductor processing system (Figure 1) of claim 10, wherein the remote plasma unit (60; Figure 1-Applicant’s 104; Figure 2) comprises an inductively coupled plasma source or a microwave ([0060]) plasma source, as claimed by claim 11 The semiconductor processing system (Figure 1) of claim 11, further comprising an exhaust flange (12; Figure 1) connected to the exhaust end (42; Figure 1) of the chamber body (12; Figure 1; [0046]) and a vacuum pump (“pump”; [0048]) coupled to the exhaust flange (12; Figure 1) and therethrough to the remote plasma unit (60; Figure 1-Applicant’s 104; Figure 2), as claimed by claim 12 It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Kilpela to add AmRhein’s enumerated components as taught by AmRhein. Motivation for Kilpela to add AmRhein’s enumerated components as taught by AmRhein is for “fabricating semiconductor and flat panel display” as taught by AmRhein ([0005]). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Kilpela, Olli et al. (US 20030075273 A1) and AmRhein, Frederick J. et al. (US 20050221618 A1) in view of Bauer; Mathias (US 7655543 B2). Kilpela and AmRhein are discussed above. Kilpela and AmRhein do not teach AmRhein’s semiconductor processing system (Figure 1) of claim 2, wherein AmRhein’s injection flange (50; Figure 1) comprises a plurality of injection ports disposed in a front face of AmRhein’s injection flange (50; Figure 1), and a plurality of flow controllers configured to control a flow of the first vapor phase reactant from a precursor source to the plurality of injection ports and therethrough to the interior of AmRhein’s chamber body (12; Figure 1), as claimed by claim 3 Bauer also teaches a cross-flow reactor (Figure 2,3) including Bauer’s injection flange (205; Figure 2,3,5) comprises a plurality of injection ports (213,226; Figure 5) disposed in a front face of Bauer’s injection flange (205; Figure 3,5), and a plurality of flow controllers (100; Figure 2; 212; Figure 5; column 8; lines 56-63) configured to control a flow of the first vapor phase reactant from a precursor source (10, 40, 20; Figure 1) to the plurality of injection ports (210,220; Figure 2; 213,226; Figure 5) and therethrough to the interior of Bauer’s chamber body (300; Figure 2), as claimed by claim 3 It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Kilpela to add Bauer’s plural source injection flange (205; Figure 2,3,5) and flow controllers (100; Figure 2; 212; Figure 5; column 8; lines 56-63) as taught by Bauer. Motivation for Kilpela to add Bauer’s plural source injection flange (205; Figure 2,3,5) and flow controllers (100; Figure 2; 212; Figure 5; column 8; lines 56-63) as taught by Bauer is for adding precursor sources for diversified film mophologies as taught by Bauer (column 3; lines 39-49). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Kilpela, Olli et al. (US 20030075273 A1) and AmRhein, Frederick J. et al. (US 20050221618 A1) in view of Canizares; Claudio (US 20150292088 A1). Kilpela and AmRhein are discussed above. Kilpela and AmRhein do not teach: Kilpela’s semiconductor processing system (Figure 4A) of claim 12, wherein Kilpela’s chamber body (100; Figure 4A; [0041],[0049]) has a plurality of external ribs (Applicant’s 210; Figure 2) extending laterally about an exterior of Kilpela’s chamber body (100; Figure 4A; [0041],[0049]) and longitudinally spaced apart from one another between Kilpela’s injection end (60,62; Figure 4A; [0041],[0049]) and the longitudinally opposite Kilpela’s exhaust end (66; Figure 4A; [0041],[0049]) of the chamber body (100; Figure 4A; [0041],[0049]), as claimed by claim 13 Canizares also teaches a cross-flow reactor (Figure 1A,B) including a plurality of external ribs (11; Figure 1B-Applicant’s 210; Figure 2) extending laterally about an exterior of the chamber body (12; Figure 1A,1B) and longitudinally spaced apart from one another between the injection end (28; Figure 1A,B) and the longitudinally opposite the exhaust end (32; Figure 1A,B;) of the chamber body (12; Figure 1A,B), as claimed by claim 13 It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Kilpela to add Canizares’ external ribs (11; Figure 1B-Applicant’s 210; Figure 2) to Kilpela’s chamber body (100; Figure 4A; [0041],[0049]). Motivation for Kilpela to add Canizares’ external ribs (11; Figure 1B-Applicant’s 210; Figure 2) to Kilpela’s chamber body (100; Figure 4A; [0041],[0049]) is for “structural” enforcement as taught by Canizare ([0055]). Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kilpela, Olli et al. (US 20030075273 A1) and AmRhein, Frederick J. et al. (US 20050221618 A1) in view of Canizares; Claudio (US 20150292088 A1). Kilpela, AmRhein, and Canizares are discussed above. Kilpela does not teach: Kilpela’s semiconductor processing system (Figure 4A) of claim 13, further comprising a heater element array supported outside of Kilpela’s chamber body (100; Figure 4A; [0041],[0049]) and optically coupled to Kilpela’s substrate support (58; Figure 4A; [0041],[0049]) and Kilpela’s isolating member (67; Figure 3A,3B,4A; [0049]-Applicant’s 146; Figure 2), the heater element array comprising:a plurality of lower linear lamps supported below Kilpela’s chamber body (100; Figure 4A; [0041],[0049]) and optically coupled to Kilpela’s substrate support (58; Figure 4A; [0041],[0049]) and Kilpela’s isolating member (67; Figure 3A,3B,4A; [0049]-Applicant’s 146; Figure 2) by a quartz material forming Kilpela’s chamber body (100; Figure 4A; [0041],[0049]); and a plurality of upper linear lamps supported above Kilpela’s chamber body (100; Figure 4A; [0041],[0049]) and optically coupled to Kilpela’s substrate support (58; Figure 4A; [0041],[0049]) and Kilpela’s isolating member (67; Figure 3A,3B,4A; [0049]-Applicant’s 146; Figure 2) by the quartz material forming Kilpela’s chamber body (100; Figure 4A; [0041],[0049]), as claimed by claim 14 AmRhein is discussed above. AmRhein further teaches AmRhein’s semiconductor processing system (Figure 4A) of claim 13, further comprising a heater element (14; Figure 1) array supported outside of the chamber body (10; Figure 1) and optically (IR) coupled to the substrate support (20; Figure 1), the heater element (14; Figure 1) array comprising:a plurality of lower linear lamps (14; Figure 1) supported below the chamber body (10; Figure 1) and optically (IR) coupled to the substrate support (20; Figure 1) by a quartz material ([0037]) forming the chamber body (10; Figure 1); and a plurality of upper linear lamps (13; Figure 1; [0039]) supported above the chamber body (10; Figure 1) and optically coupled to the substrate support (20; Figure 1) by the quartz ([0037]) material forming the chamber body (10; Figure 1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Kilpela to add AmRhein’s heating elements Motivation for Kilpela to add AmRhein’s heating elements is for at least countering “…a heat sink effect created by cold support structures extending through the bottom of the reaction chamber 12.” as taught by AmRhein ([0039]). Allowable Subject Matter Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Kilpela, AmRhein, and Canizares as the closest cited prior art are discussed above. Kilpela, AmRhein, and Canizares do not teach, alone or in combination, the semiconductor processing system (Figure 4A) of claim 14, further comprising a controller including a processor and memory having instructions recorded on the memory that, when read by the processor, cause the processor to:seat the substrate on the substrate support; provide a germanium precursor to the injection flange; provide the silicon precursor to the remote plasma unit; decompose at least a portion of the silicon precursor using the remote plasma unit (Applicant’s 104; Figure 2) to generate the plasma generated reactant; and depositing one or more epitaxial silicon-containing layers onto the substrate by combining the germanium precursor with the plasma generated reactant created using a decomposition product generated from the silicon precursor,wherein depositing the one or more epitaxial silicon-containing layers is an isothermal deposition process, as claimed by claim 15. Demos; Alexandros et al.(US 20230203706 A1) teaches the status of the art with respect to similar precursors, remote plasma generation, and process control but does not teach, alone or in combination, the subject matter as claimed by claim 15. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Remote plasma apparatus with cross-flow reactors similar in structure and function include US 20230203706 A1; US 4976996 A; US 20060275546 A1; US 20030072975 A1; US 7569284 B2; US 20030015137 A1; US 20020197402 A1; US 6190457 B1; US 5370738 A; US 6820570 B2; US 20130203267 A1; US 20240412948 A1 Any inquiry concerning this communication or earlier communications from the examiner should be directed to Examiner Rudy Zervigon whose telephone number is (571) 272- 1442. The examiner can normally be reached on a Monday through Thursday schedule from 8am through 6pm EST. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Any Inquiry of a general nature or relating to the status of this application or proceeding should be directed to the Chemical and Materials Engineering art unit receptionist at (571) 272-1700. If the examiner cannot be reached please contact the examiner's supervisor, Parviz Hassanzadeh, at (571) 272- 1435. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http:/Awww.uspto.gov/interviewpractice. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or (571) 272-1000. /Rudy Zervigon/ Primary Examiner, Art Unit 1716
Read full office action

Prosecution Timeline

Aug 28, 2025
Application Filed
Sep 22, 2026
Non-Final Rejection mailed — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12768043
HARDWARE TO UNIFORMLY DISTRIBUTE ACTIVE SPECIES FOR SEMICONDUCTOR FILM PROCESSING
4y 5m to grant Granted Oct 20, 2026
Patent 12770838
LINER AND EDGE RING TO PREVENT GAS DIFFUSION
2y 8m to grant Granted Oct 20, 2026
Patent 12760418
GAS SUPPLY UNIT AND SUBSTRATE PROCESSING APPARATUS INCLUDING GAS SUPPLY UNIT
3y 9m to grant Granted Oct 13, 2026
Patent 12765324
SHAFT MEMBERS, PROCESS KITS AND SEMICONDUCTOR PROCESSING SYSTEMS HAVING SHAFT MEMBERS, AND METHODS OF MAKING SEMICONDUCTOR PROCESSING SYSTEMS
2y 9m to grant Granted Oct 13, 2026
Patent 12760412
NOZZLE FOR REMOTE PLASMA CLEANING OF PROCESS CHAMBERS
3y 0m to grant Granted Oct 13, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
67%
Grant Probability
62%
With Interview (-5.4%)
3y 5m (~2y 3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1082 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month