Prosecution Insights
Last updated: October 25, 2026

Hitachi Power Semiconductor Device, Ltd.

Technology area: Semiconductors, Circuits & Optics

2 pending office actions • 2 art units • 2 examiners • 0 of 2 (0%) have an AI response strategy ready • 11 patents granted in the last 365 days

Analysis

Hitachi Power Semiconductor Device, Ltd. maintains a company patent portfolio within the Semiconductors, Circuits & Optics technology area. The portfolio currently features 2 pending office actions, which are distributed across 2 distinct examiners. This distribution means that the company must manage the individual preferences and review styles of 2 distinct examiners simultaneously. Furthermore, these matters are spread across 2 distinct art units, suggesting that the company's innovations span multiple specialized sub-fields within the Semiconductors, Circuits & Optics sector.

ANDERSON, ERIK ARTHUR is the busiest examiner for the portfolio, currently managing 1 busiest examiner pending action. Since there are 2 pending office actions in total, the workload is spread across the 2 distinct examiners, with no single individual handling more than 1 action. For patent practitioners, the involvement of 2 distinct art units adds complexity, as each unit may have its own specific procedural tendencies and standards. The presence of 2 distinct examiners for 2 pending office actions ensures that the company's progress is not overly dependent on the timeline or decision-making of a single individual. This diversified structure requires a flexible prosecution strategy that can adapt to the varying requirements of 2 distinct art units and their respective examiners.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

2
Total Pending OAs
1
Non-Final OAs
1
Final Rejections
0
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 1 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

0
Overdue
0
Due this week
1
Due this month
0
Due in next 60 days
0
Due later

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

1
Hard (50%)
1
Medium (50%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only1 (50%)
Multi-statute (no §101)1 (50%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
2
Semiconductors
100% of docket
0
Mechanical / Eng
0% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

20 h
Manual time on pending OAs
4 h
Time saved (low, 20%)
7 h
Time saved (mid, 35%)
0.2 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
ANDERSON, ERIK ARTHUR 1 95.0% +12.0%
HUTSON, NICHOLAS LELAND 1 68.8% +6.1%

Hard Cases (1)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18566691 POWER SEMICONDUCTOR MODULE ANDERSON, ERIK ARTHUR 9d

Interview Candidates (1)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18566691 POWER SEMICONDUCTOR MODULE ANDERSON, ERIK ARTHUR 9d

Top Art Units

Art UnitApps
2812 1
2818 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18566691 POWER SEMICONDUCTOR MODULE ANDERSON, ERIK ARTHUR 2812 §103§112 Final Rejection 9d Pending Dec 04, 2023
18253611 POWER SEMICONDUCTOR DEVICE HUTSON, NICHOLAS LELAND 2818 §103 Non-Final OA — Pending May 19, 2023

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Frequently Asked Questions

How many pending USPTO office actions does Hitachi Power Semiconductor Device, Ltd. have?

Hitachi Power Semiconductor Device, Ltd. has 2 pending office actions as of October 2026, spread across 2 art units and 2 examiners.

Which USPTO examiner handles the most Hitachi Power Semiconductor Device, Ltd. applications?

Erik Arthur Anderson has the most, with 1 of Hitachi Power Semiconductor Device, Ltd.'s pending office actions.

What technology area are Hitachi Power Semiconductor Device, Ltd.'s patent applications in?

Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.

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