Prosecution Insights
Last updated: October 27, 2026

Erik Arthur Anderson, USPTO Patent Examiner

Listed by the USPTO as ANDERSON, ERIK ARTHUR

Tech Center 4100 • Art Units: 2812 4100

This examiner grants 95% of resolved cases

Analysis

ANDERSON, ERIK ARTHUR works in Tech Center 4100 and Art Unit 2812. The profile reports 60 resolved cases, a 95.0% allowance rate, and a median of 1209 days to allowance. The interview lift is 12.0%.

The listed companies are Samsung Electronics Co., Ltd., LG Display Co., Ltd., and International Business Machines Corporation. The listed firms are BIRCH STEWART KOLASCH & BIRCH, LLP, CHIP LAW GROUP, and FISH & RICHARDSON P.C. (TC). The smaller resolved-case base warrants care when projecting individual outcomes. The allowance figure and timing measure can still inform initial planning, while interviews may be considered when a focused discussion can resolve a particular examination issue.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

95.0%
Allow Rate
+35.0% vs TC avg
83
Total Applications
+12.0%
Interview Lift
1209
Avg Prosecution Days
Based on 60 resolved cases, 2023–2026

Rejection Statute Breakdown

0%
§101 Eligibility
24.1%
§102 Novelty
46.1%
§103 Obviousness
29.8%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18739668 SEMICONDUCTOR MEMORY DEVICE Non-Final OA Samsung Electronics Co., Ltd.
18733210 LAMINATING DEVICE AND METHOD OF FABRICATING SEMICONDUCTOR CHIP USING THE SAME Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18816224 SEMICONDUCTOR MODULE AND MANUFACTURING METHOD THEREFOR Non-Final OA FUJI ELECTRIC CO., LTD.
18781071 Display Apparatus Non-Final OA LG Display Co., Ltd.
18376565 DISPLAY PANEL AND DISPLAY DEVICE Final Rejection LG Display Co., Ltd.
18517135 DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME Final Rejection Samsung Display Co., LTD.
18818634 LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUS Non-Final OA SEIKO EPSON CORPORATION
18705613 PHOTOELECTRIC CONVERSION DEVICE Non-Final OA SONY SEMICONDUCTOR SOLUTIONS CORPORATION
17481237 GLASS CORE SUBSTRATE INCLUDING BUILDUPS WITH DIFFERENT NUMBERS OF LAYERS Final Rejection Intel Corporation
18648444 TSV MOISTURE BARRIER Non-Final OA INTERNATIONAL BUSINESS MACHINES CORPORATION
18608426 NANOSHEET CHANNEL LAYER OF VARYING THICKNESSES Final Rejection International Business Machines Corporation
18634659 OPTIMUM MATERIAL STACKS FOR SEMICONDUCTOR CONTACTS Non-Final OA Applied Materials, Inc.
18377159 METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM Final Rejection KOKUSAI ELECTRIC CORPORATION

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Frequently Asked Questions

What is examiner Erik Arthur Anderson's allowance rate?

95.0% of resolved applications examined by Erik Arthur Anderson were allowed (60 resolved cases), compared with 82.1% across Art Unit 2812 over the last five years.

Does an interview help with examiner Erik Arthur Anderson?

This examiner's interview lift is +12.0 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Erik Arthur Anderson take to allow a patent?

Applications allowed by Erik Arthur Anderson took 1,209 days on average from filing to allowance.

Which art unit does examiner Erik Arthur Anderson work in?

Erik Arthur Anderson examines applications in Art Unit 2812 in Tech Center 4100.

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