Prosecution Insights
Last updated: October 27, 2026

Nicholas Leland Hutson, USPTO Patent Examiner

Listed by the USPTO as HUTSON, NICHOLAS LELAND

Tech Center 2800 • Art Units: 2818

This examiner grants 69% of resolved cases

Analysis

HUTSON, NICHOLAS LELAND is assigned to art unit 2818 in tech center 2800, with 32 resolved cases. The allowance rate is 68.8%, and the median time to allowance is 1241 days. The limited case volume constrains broader inference, while the reported median suggests that prosecution may require extended planning.

The interview lift is 6.1%, a modest signal relative to the 68.8% allowance rate. Practitioners may use interviews selectively and rely on precise written responses to address the principal claim issues. The listed companies are Fuji Electric Co., Ltd., Samsung Electronics Co., Ltd., and LG Display Co., Ltd. The listed firms are BAKER BOTTS L.L.P., BIRCH STEWART KOLASCH & BIRCH, LLP, and Cognition IP, P.C.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

68.8%
Allow Rate
+0.8% vs TC avg
61
Total Applications
+6.1%
Interview Lift
1241
Avg Prosecution Days
Based on 32 resolved cases, 2023–2026

Rejection Statute Breakdown

0%
§101 Eligibility
37.7%
§102 Novelty
52.8%
§103 Obviousness
8.0%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18439308 VERTICAL NAND FLASH MEMORY DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME Final Rejection SAMSUNG ELECTRONICS CO., LTD.
17976373 SEMICONDUCTOR MODULE Non-Final OA FUJI ELECTRIC CO., LTD.
18775642 Display Device Non-Final OA LG Display Co., Ltd.
18520556 DISPLAY APPARATUS Final Rejection Samsung Display Co., Ltd.
18502649 POWER DEVICE PROGNOSTICS WITH QUANTUM SENSING THROUGH 2-D MATERIALS Non-Final OA Toyota Motor Engineering & Manufacturing North America, Inc.
17950662 Semiconductor Packages and Methods for Manufacturing Thereof Non-Final OA Infineon Technologies AG
17926414 MOUNTING STRUCTURE FOR SEMICONDUCTOR MODULE Final Rejection ROHM CO., LTD.
18505569 SIC-BASED ELECTRONIC DEVICE WITH MULTILAYER AND MULTIFUNCTIONAL PASSIVATION, AND METHOD OF MANUFACTURING THE ELECTRONIC DEVICE Non-Final OA STMICROELECTRONICS INTERNATIONAL N.V.
18051051 DISPLAY PANEL AND ELECTRONIC TERMINAL Final Rejection Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.

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Frequently Asked Questions

What is examiner Nicholas Leland Hutson's allowance rate?

68.8% of resolved applications examined by Nicholas Leland Hutson were allowed (32 resolved cases), compared with 85.2% across Art Unit 2818 over the last five years.

Does an interview help with examiner Nicholas Leland Hutson?

This examiner's interview lift is +6.1 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Nicholas Leland Hutson take to allow a patent?

Applications allowed by Nicholas Leland Hutson took 1,241 days on average from filing to allowance.

Which art unit does examiner Nicholas Leland Hutson work in?

Nicholas Leland Hutson examines applications in Art Unit 2818 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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