Prosecution Insights
Last updated: October 04, 2026

Lattice Semiconductor Corporation

Technology areas: Computing & Software • Networking & Security

4 pending office actions • 2 art units • 4 examiners • 0 of 4 (0%) have an AI response strategy ready • 10 patents granted in the last 365 days

Analysis

Lattice Semiconductor Corporation is currently addressing 4 pending office actions in the Computing & Software technology area. These actions are distributed among 4 distinct examiners, meaning each of the 4 pending matters is being reviewed by a different individual. The portfolio is active across 2 distinct art units, suggesting that the company's technical focus is split between 2 primary classifications. This distribution across 2 distinct art units indicates a focused technical scope even with 4 separate actions in progress.

RAYMOND NGAN PHAN is the busiest examiner for the company, overseeing 1 busiest examiner pending office action. With 4 pending office actions and 4 distinct examiners, the workload is distributed such that each examiner handles 1 case. This distribution across 2 distinct art units and 4 examiners indicates a varied but organized prosecution landscape for the company's current computing and software filings. Practitioners should be prepared to manage 4 distinct examiner relationships while ensuring that the strategy remains consistent across the 2 distinct art units identified in the data.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

4
Total Pending OAs
3
Non-Final OAs
1
Final Rejections
0
Advisory / Quayle

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

2
Hard (50%)
1
Medium (25%)
0
Easy (0%)
1
Unknown (25%)

Rejection Statute Mix

BucketCases
§103 only1 (25%)
Multi-statute (no §101)2 (50%)
No statute on record1 (25%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
2
Information Tech
50% of docket
0
Communications
0% of docket
0
Semiconductors
0% of docket
0
Mechanical / Eng
0% of docket
2
Business / Other
50% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

40 h
Manual time on pending OAs
8 h
Time saved (low, 20%)
14 h
Time saved (mid, 35%)
0.3 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
PHAN, RAYMOND NGAN 1 93.7% -6.6%
BINCZAK, BRANDON MICHAEL 1 39.1% +33.4%
SUMMERS, GEOFFREY E 1 71.5% +35.8%
NGUYEN, NHA T 1 87.2% +18.3%

Quick Wins (1)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18525550 CONFIGURABLE CLOCK ENABLE AND RESET SIGNAL FOR PROGRAMMABLE LOGIC DEVICES SYSTEMS AND METHODS NGUYEN, NHA T —

Hard Cases (2)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.

App #TitleExaminerDue in
18916352 ROOT OF TRUST CHAIN AND UPDATABLE SECURITY FOR PROGRAMABLE LOGIC DEVICES, SYSTEMS, AND METHODS BINCZAK, BRANDON MICHAEL —
18820155 IMAGE TAGGING ENGINE SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES SUMMERS, GEOFFREY E —

Interview Candidates (3)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 3 ordered by deadline are shown.

App #TitleExaminerDue in
18916352 ROOT OF TRUST CHAIN AND UPDATABLE SECURITY FOR PROGRAMABLE LOGIC DEVICES, SYSTEMS, AND METHODS BINCZAK, BRANDON MICHAEL —
18820155 IMAGE TAGGING ENGINE SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES SUMMERS, GEOFFREY E —
18525550 CONFIGURABLE CLOCK ENABLE AND RESET SIGNAL FOR PROGRAMMABLE LOGIC DEVICES SYSTEMS AND METHODS NGUYEN, NHA T —

Top Art Units

Art UnitApps
2175 1
2437 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18924915 PHYSICAL CODING SUBLAYER DATAPATH SYSTEMS AND METHODS WITH DETERMINISTIC LATENCY PHAN, RAYMOND NGAN 2175 Other Non-Final OA — Pending Oct 23, 2024
18916352 ROOT OF TRUST CHAIN AND UPDATABLE SECURITY FOR PROGRAMABLE LOGIC DEVICES, SYSTEMS, AND METHODS BINCZAK, BRANDON MICHAEL 2437 §102§103§112 Non-Final OA — Pending Oct 15, 2024
18820155 IMAGE TAGGING ENGINE SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES SUMMERS, GEOFFREY E — §103§112 Final Rejection — Pending Aug 29, 2024
18525550 CONFIGURABLE CLOCK ENABLE AND RESET SIGNAL FOR PROGRAMMABLE LOGIC DEVICES SYSTEMS AND METHODS NGUYEN, NHA T — §103 Non-Final OA — Pending Nov 30, 2023

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