Technology areas: Chemistry & Materials • Semiconductors, Circuits & Optics
3 pending office actions • 3 art units • 3 examiners • 0 of 3 (0%) have an AI response strategy ready • 11 patents granted in the last 365 days
Toyota Tsusho Corporation is managing 3 pending office actions in the Semiconductors, Circuits & Optics technology area. These actions are spread across distinct examiners and the distinct art units. There are 3 distinct examiners involved in the cases.
The busiest examiner is MALEVIC, DJURA, who is responsible for 1 pending office action. Each examiner handles 1 action.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 1 (33%) |
| Multi-statute (no §101) | 2 (67%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| MALEVIC, DJURA | 1 | 78.1% | +10.1% |
| QI, HUA | 1 | 56.5% | +23.0% |
| COOK, JONATHON | 1 | 81.6% | +17.1% |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18840885 | METHOD FOR SUPPRESSING FORMATION OF STACKING FAULT, STRUCTURE PRODUCED BY THIS METHOD, AND METHOD FOR EVALUATING AFFECTED LAYER | QI, HUA | — |
| 18261101 | METHOD AND SYSTEM FOR EVALUATING WORK-AFFECTED LAYER | COOK, JONATHON | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18996860 | METHOD FOR SUPPRESSING VARIATION IN LIGHT EMISSION INTENSITY OF BACKGROUND IN PHOTOLUMINESCENCE MEASUREMENT, AND EVALUATION METHOD FOR SEMICONDUCTOR SUBSTRATE | MALEVIC, DJURA | — |
| 18840885 | METHOD FOR SUPPRESSING FORMATION OF STACKING FAULT, STRUCTURE PRODUCED BY THIS METHOD, AND METHOD FOR EVALUATING AFFECTED LAYER | QI, HUA | — |
| 18261101 | METHOD AND SYSTEM FOR EVALUATING WORK-AFFECTED LAYER | COOK, JONATHON | — |
| Art Unit | Apps |
|---|---|
| 2884 | 1 |
| 1714 | 1 |
| 2877 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18996860 | METHOD FOR SUPPRESSING VARIATION IN LIGHT EMISSION INTENSITY OF BACKGROUND IN PHOTOLUMINESCENCE MEASUREMENT, AND EVALUATION METHOD FOR SEMICONDUCTOR SUBSTRATE | MALEVIC, DJURA | 2884 | §103 | Non-Final OA | — | Pending | Jan 17, 2025 |
| 18840885 | METHOD FOR SUPPRESSING FORMATION OF STACKING FAULT, STRUCTURE PRODUCED BY THIS METHOD, AND METHOD FOR EVALUATING AFFECTED LAYER | QI, HUA | 1714 | §102§103 | Non-Final OA | — | Pending | Aug 22, 2024 |
| 18261101 | METHOD AND SYSTEM FOR EVALUATING WORK-AFFECTED LAYER | COOK, JONATHON | 2877 | §102§103§112 | Non-Final OA | — | Pending | Jul 11, 2023 |
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Start Free TrialToyota Tsusho Corporation has 3 pending office actions as of October 2026, spread across 3 art units and 3 examiners.
Djura Malevic has the most, with 1 of Toyota Tsusho Corporation's pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
