Listed by the USPTO as BARZYKIN, VICTOR V
Tech Center 2800 • Art Units: 1726 2811 2817 2821 2822 2884 2893
This examiner grants 82% of resolved cases
Victor V. Barzykin is an examiner in Tech Center 2800, managing cases within Art Unit 1726. With 479 resolved cases, the examiner demonstrates a high allowance rate of 82.3 percent. This suggests a favorable environment for applicants seeking patent protection. The median days to allowance is 826, which establishes a timeline for the prosecution lifecycle from filing to grant. The interview lift is recorded at 4.0 percent, indicating that while interviews are helpful, most cases reach allowance through standard written prosecution. This lift is a modest strategic consideration for practitioners appearing before this examiner.
The examiner frequently interacts with companies including Samsung Electronics Co., Ltd., Intel Corporation, and Apple Inc. These entities, along with legal representatives from Arcane Law PLLC, Asem IP Counsel, and Birch Stewart Kolasch & Birch, LLP, navigate a process where 82.3 percent of cases reach allowance. The 826 days to allowance serves as a metric for managing client expectations regarding the speed of the patent office's review. The 4.0 percent interview lift suggests that direct engagement offers a slight benefit. With 479 resolved cases, the examiner has a well established track record in Tech Center 2800. Practitioners can use these data points to refine their strategies when appearing before Art Unit 1726.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18518114 | SEMICONDUCTOR DEVICE INCLUDING CRACK DETECTION CIRCUIT | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18351748 | METHOD OF MANUFACTURING A STACKED SEMICONDUCTOR PACKAGE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18646483 | DISPLAY DEVICE | Non-Final OA | LG Display Co., Ltd. |
| 18423763 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | Non-Final OA | Samsung Display Co., LTD. |
| 18264947 | SEMICONDUCTOR DEVICE | Non-Final OA | SONY SEMICONDUCTOR SOLUTIONS CORPORATION |
| 18649460 | SEMICONDUCTOR DEVICE, RELATED CIRCUIT, CHIP, ELECTRONIC DEVICE, AND PREPARATION METHOD | Non-Final OA | Huawei Digital Power Technologies Co., Ltd. |
| 18148148 | METHODS AND APPARATUS TO REDUCE SOLDER BUMP BRIDGING BETWEEN TWO SUBSTRATES | Non-Final OA | Intel Corporation |
| 18087879 | METAL GATE CUT WITH HYBRID MATERIAL FILL | Final Rejection | Intel Corporation |
| 18686337 | ELECTRONIC ELEMENT MOUNTING SUBSTRATE, ELECTRONIC DEVICE, AND ELECTRONIC MODULE | Final Rejection | KYOCERA Corporation |
| 18424247 | METHOD FOR ATTACHING DISCRETE POWER MODULES TO A SUBSTRATE | Non-Final OA | Ford Global Technologies, LLC |
| 18734605 | SUPERJUNCTION TRANSISTOR DEVICE | Final Rejection | Infineon Technologies Austria AG |
| 18736947 | ALIGNMENT MARK STRUCTURE AND METHOD FOR MAKING | Final Rejection | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18230720 | SYSTEMS FOR VISIBLE WAVELENGTH MEASUREMENT OF OVERLAY OF WAFER-ON-WAFER BONDING AND METHODS OF FORMING THE SAME | Final Rejection | Taiwan Semiconductor Manufacturing Company Limited |
| 18181559 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | Non-Final OA | United Microelectronics Corp. |
| 18231130 | METHOD FOR MANUFACTURING DISPLAY PANEL WITH NO COLOR UNEVENNESS USING INKJET | Non-Final OA | PUKYONG NATIONAL UNIVERSITY INDUSTRY-UNIVERSITY COOPERATION FOUNDATION |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy82.3% of resolved applications examined by Victor V Barzykin were allowed (479 resolved cases), compared with 35.4% across Art Unit 1726 over the last five years.
This examiner's interview lift is +4.0 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Victor V Barzykin took 826 days on average from filing to allowance.
Victor V Barzykin examines applications in Art Unit 1726 in Tech Center 2800 (Semiconductors, Circuits & Optics).