Prosecution Insights
Last updated: October 27, 2026

Nelson Y Garces, USPTO Patent Examiner

Listed by the USPTO as GARCES, NELSON Y

Tech Center 4100 • Art Units: 2814 2892 4100

This examiner grants 81% of resolved cases

Analysis

GARCES, NELSON Y is assigned to tech center 4100 and art unit 2814. The record covers 606 resolved cases, with an allowance rate of 80.7% and a median of 914 days to allowance. Allowance is the predominant recorded outcome, and the timing figure indicates that applicants should still plan for a meaningful examination period. Interviews show a 3.7% lift, so they appear most useful when a particular issue warrants direct clarification.

The leading companies are Samsung Display Co., Ltd., Intel Corporation, and STMicroelectronics N.V. The principal firms are CANTOR COLBURN LLP, Arcane Law PLLC, and Cooper Legal Group LLC. This mix provides context for display and semiconductor matters. Counsel can use the listed organizations to identify relevant experience while relying on focused written arguments and claim amendments.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

80.7%
Allow Rate
+20.7% vs TC avg
642
Total Applications
+3.7%
Interview Lift
914
Avg Prosecution Days
Based on 606 resolved cases, 2023–2026

Rejection Statute Breakdown

0.2%
§101 Eligibility
32.6%
§102 Novelty
50.5%
§103 Obviousness
13.8%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18614804 INTEGRATED CIRCUIT DEVICE Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18477635 SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE Final Rejection FUJI ELECTRIC CO., LTD.
18508827 PANEL AND METHOD FOR MANUFACTURING THE SAME Final Rejection CANON KABUSHIKI KAISHA
18443670 MASK ASSEMBLY AND METHOD OF MANUFACTURING DISPLAY APPARATUS Non-Final OA Samsung Display Co., Ltd.
18422572 DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE Non-Final OA Samsung Display Co., LTD.
18421611 DISPLAY DEVICE Final Rejection Samsung Display Co., LTD.
17972937 PIXELATED FILTER COMPRISING AN INTERFERENCE FILTER Non-Final OA Commissariat à l'Énergie Atomique et aux Énergies Alternatives
18114120 PROTECTION AGAINST ELECTROMIGRATION WITHIN A LAYER OF AN INTEGRATED CIRCUIT Final Rejection Intel Corporation
18174007 NANORIBBON-BASED TRANSISTORS WITH ETCH STOP LAYER TO ASSIST SUBFIN REMOVAL Final Rejection Intel Corporation
17940195 BARRIER LAYER FOR DIELECTRIC RECESS MITIGATION Non-Final OA Intel Corporation
18505928 SEMICONDUCTOR DEVICE ASSEMBLIES WITH AN ENCAPSULANT MATERIAL HAVING ENHANCED THERMAL CONDUCTIVITY, AND METHODS FOR MAKING THE SAME Final Rejection Micron Technology, Inc.
18292529 PHOTODIODE ARRAY AND METHOD FOR MANUFACTURING PHOTODIODE ARRAY Non-Final OA KYOCERA Corporation
18475476 CONTACTS FOR JOSEPHSON JUNCTION-BASED QUBITS Non-Final OA International Business Machines Corporation
18603113 METHOD FOR MANUFACTURING A PLURALITY OF ELECTRONIC COMPONENTS Non-Final OA STMicroelectronics International N.V.
18590785 AIR-GAP IN TRENCH FIELD PLATE POWER MOSFET FOR REDUCED POWER LOSS PERFORMANCE Non-Final OA STMicroelectronics International N.V.
18443616 DEVICE PACKAGE AND MANUFACTURING METHOD THEREOF Final Rejection TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
18413062 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18756313 SEMICONDUCTOR DEVICE AND METHOD OF MAKING THE SAME Non-Final OA TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
18760808 METHOD OF MANUFACTURING LIGHT-EMITTING ELEMENT Non-Final OA NICHIA CORPORATION
18038066 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF Final Rejection Semiconductor Manufacturing International (Beijing) Corporation

Facing This Examiner?

IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.

Build Your Strategy

Who Appears Before This Examiner

Top companies before this examiner

Law firms appearing most often

Frequently Asked Questions

What is examiner Nelson Y Garces's allowance rate?

80.7% of resolved applications examined by Nelson Y Garces were allowed (606 resolved cases), compared with 74.2% across Art Unit 2814 over the last five years.

Does an interview help with examiner Nelson Y Garces?

This examiner's interview lift is +3.7 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Nelson Y Garces take to allow a patent?

Applications allowed by Nelson Y Garces took 914 days on average from filing to allowance.

Which art unit does examiner Nelson Y Garces work in?

Nelson Y Garces examines applications in Art Unit 2814 in Tech Center 4100.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month