Prosecution Insights
Last updated: October 27, 2026

Steven Ho Yin Loke, USPTO Patent Examiner

Listed by the USPTO as LOKE, STEVEN HO YIN

Tech Center 2800 • Art Units: 2800 2817 2818 2892

This examiner grants 40% of resolved cases

Analysis

LOKE, STEVEN HO YIN is assigned to Tech Center 2800 and Art Unit 2800. The profile includes 78 resolved cases, a 39.7% allowance rate, and a median of 1137 days to allowance. Interview lift is 34.6%, showing a strong positive association between interviews and allowance outcomes.

The listed companies are United Microelectronics Corp., Samsung Electronics Co., Ltd., and Intel Corporation. NORTH AMERICA INTELLECTUAL PROPERTY CORPORATION, BIRCH STEWART KOLASCH & BIRCH, LLP, and BOOTH UDALL, PLC are the associated firms. The lower allowance rate supports careful claim and prior-art analysis, while the interview figure makes structured examiner discussions worth evaluating.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

39.7%
Allow Rate
-28.3% vs TC avg
94
Total Applications
+34.6%
Interview Lift
1137
Avg Prosecution Days
Based on 78 resolved cases, 2023–2026

Rejection Statute Breakdown

0.6%
§101 Eligibility
29.3%
§102 Novelty
52.8%
§103 Obviousness
16.7%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18051943 SEMICONDUCTOR DEVICES WITH IMPROVED INTEGRATION AND RELIABILITY Final Rejection Samsung Electronics Co., Ltd.
17129838 STIFFENER AND SOCKET EMBEDDED METAL INSERT ARCHITECTURES FOR POWER DELIVERY Non-Final OA Intel Corporation
18359669 Area Efficient Fin-Based Laterally-Diffused Metal-Oxide Semiconductor Field-Effect Transistor Non-Final OA Avago Technologies International Sales Pte. Limited
18378858 CHIP WITH CRACK GUIDING STRUCTURE COMBINED WITH CRACK STOP STRUCTURE Final Rejection Infineon Technologies AG
17854388 METHOD FOR FORMING FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE WITH DEEP CONTACT STRUCTURE Final Rejection Taiwan Semiconductor Manufacturing Company, Ltd.
17827994 HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR FABRICATING THE SAME Final Rejection UNITED MICROELECTRONICS CORP.
17669381 HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR FABRICATING THE SAME Final Rejection UNITED MICROELECTRONICS CORP.

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Frequently Asked Questions

What is examiner Steven Ho Yin Loke's allowance rate?

39.7% of resolved applications examined by Steven Ho Yin Loke were allowed (78 resolved cases), compared with 69.7% across Art Unit 2800 over the last five years.

Does an interview help with examiner Steven Ho Yin Loke?

This examiner's interview lift is +34.6 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Steven Ho Yin Loke take to allow a patent?

Applications allowed by Steven Ho Yin Loke took 1,137 days on average from filing to allowance.

Which art unit does examiner Steven Ho Yin Loke work in?

Steven Ho Yin Loke examines applications in Art Unit 2800 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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