Technology area: Semiconductors, Circuits & Optics
174 pending office actions • 4 clients • 140 examiners • 41 art units • 49 of 174 (28%) have an AI response strategy ready
SCHWABE, WILLIAMSON & WYATT, P.C. reports 16676 career applications, 167 pending office actions, and a Semiconductors, Circuits & Optics focus. The figures show a large historical application record and substantial ongoing prosecution activity in a field where device, circuit, and process limitations can materially affect claim strategy.
The resolved allowance rate is 90.04%, and the average is 3.46 office actions per allowance. These measures provide separate context for historical resolution and examination effort. Practitioners can use them to support portfolio planning, but they do not identify the technologies, cited references, or legal grounds underlying particular outcomes.
Individual file analysis should connect the aggregate indicators to the technical record. Review of circuit relationships, device structures, optical features, and process support can clarify whether amendments or arguments address the examiner's position while preserving meaningful protection.
Based on the USPTO statutory response window for each pending office action. 48 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 48 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §101 + other | 3 (2%) |
| §103 only | 66 (38%) |
| §102 only | 10 (6%) |
| §112 only | 8 (5%) |
| Double-patenting only | 1 (1%) |
| Double-patenting + other | 1 (1%) |
| Multi-statute (no §101) | 73 (42%) |
| No statute on record | 12 (7%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| HANUMASAGAR, SHAMITA S | 5 | 76.7% | -6.8% |
| WEGNER, AARON MICHAEL | 3 | 75.6% | -3.6% |
| MUNOZ, ANDRES F | 2 | 76.5% | +17.3% |
| NGUYEN, JIMMY T | 2 | 76.4% | +23.6% |
| VALENZUELA, PATRICIA D | 2 | 90.3% | +2.0% |
| HENRY, CALEB E | 2 | 86.9% | +6.0% |
| KOO, LAMONT B | 2 | 80.6% | +5.2% |
| VU, VU A | 2 | 92.3% | +6.7% |
| STARK, JARRETT J | 2 | 70.4% | +11.0% |
| TRAN, TRANG Q | 2 | 81.4% | +7.2% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 5 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18390952 | GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES FABRICATED USING ALTERNATE ETCH SELECTIVE MATERIAL | KOO, LAMONT B | 22d |
| 18438450 | INTEGRATED TOP SIDE POWER DELIVERY THERMAL TECHNOLOGY | VALENZUELA, PATRICIA D | 34d |
| 18516595 | SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITHOUT FIN END GAP | KOO, LAMONT B | 40d |
| 18242322 | PACKAGE WITH EMBEDDED CAPACITORS | TRAN, TRANG Q | 55d |
| 17956760 | SIDE OF A DIE THAT IS COPLANAR WITH A SIDE OF A MOLDING | VU, VU A | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 17481234 | MULTIPLE DIES COUPLED WITH A GLASS CORE SUBSTRATE | TRAN, TRANG Q | 80d overdue |
| 17554442 | GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING RAISED WALL STRUCTURES FOR EPITAXIAL SOURCE OR DRAIN REGION CONFINEMENT | ADHIKARI DAWADI, BIPANA | 45d overdue |
| 18654739 | SAWMILL CARRIAGE, SAWMILL CARRIAGE KIT, AND METHOD OF USING SAME | LEE, LAURA MICHELLE | 30d overdue |
| 17481237 | GLASS CORE SUBSTRATE INCLUDING BUILDUPS WITH DIFFERENT NUMBERS OF LAYERS | ANDERSON, ERIK ARTHUR | 11d overdue |
| 17346990 | INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATES WITH REDUCED ASPECT RATIO CUTS | HANUMASAGAR, SHAMITA S | 11d overdue |
| 18089491 | LIQUID METAL WELLS FOR INTERCONNECT ARCHITECTURES | WOLDEGEORGIS, ERMIAS T | 8d overdue |
| 17826933 | USB TYPE-C SUBSYSTEM | UNELUS, ERNEST | 4d overdue |
| 18071246 | INTEGRATED OPTICAL PHASE CHANGE MATERIALS FOR RECONFIGURABLE OPTICS IN GLASS CORES | PENG, CHARLIE YU | 1d overdue |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 6 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 19033078 | INTEGRATED CIRCUIT PACKAGE HAVING WIREBONDED MULTI-DIE STACK | MUNOZ, ANDRES F | 70d |
| 18649530 | MODULAR PRESS | NGUYEN, JIMMY T | 83d |
| 19023571 | SAWMILL BED ASSEMBLY | NGUYEN, JIMMY T | — |
| 18400772 | INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED EPITAXIAL SOURCE OR DRAIN STRUCTURE | MUNOZ, ANDRES F | — |
| 18244689 | PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES | STARK, JARRETT J | — |
| 18216909 | INTEGRATED CIRCUIT STRUCTURES HAVING ALTERNATIVE CARRIERS FOR DUAL-SIDED DEVICES | STARK, JARRETT J | — |
| Client (Assignee) | Pending OAs |
|---|---|
| Intel | 169 |
| Norwood Industries | 2 |
| USNR, LLC | 2 |
| Simonds International LLC | 1 |
| Art Unit | Apps |
|---|---|
| 2812 | 20 |
| 2818 | 15 |
| 2898 | 14 |
| 2893 | 13 |
| 2897 | 12 |
| 2814 | 12 |
| 2899 | 8 |
| 2817 | 7 |
| 2847 | 6 |
| 2874 | 6 |
| App # | Title | Client | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|---|
| 19059871 | STATIC RANDOM-ACCESS MEMORY | Intel Corporation | NGUYEN, VIET Q | 2827 | §102 | Non-Final OA | — | Pending | Feb 21, 2025 |
| 19033078 | INTEGRATED CIRCUIT PACKAGE HAVING WIREBONDED MULTI-DIE STACK | Intel Corporation | MUNOZ, ANDRES F | 2818 | §103 | Non-Final OA | 70d | AI Ready | Jan 21, 2025 |
| 19023571 | SAWMILL BED ASSEMBLY | Norwood Industries Inc. | NGUYEN, JIMMY T | 3725 | §102§103§112 | Non-Final OA | — | Pending | Jan 16, 2025 |
| 19000286 | LOG AND CANT OPTIMIZATION | USNR, LLC | ZERVOS, NIKOLAOS PHILLIP | 2117 | §102§103§112 | Non-Final OA | — | Pending | Dec 23, 2024 |
| 18918478 | ELECTRICAL INTERCONNECT BRIDGE | Intel Corporation | MCALLISTER, MICHAEL F | 2847 | §102§103 | Final Rejection | — | Pending | Oct 17, 2024 |
| 18902427 | STACKABLE PHOTONICS DIE WITH DIRECT OPTICAL INTERCONNECT | Intel Corporation | MOONEY, MICHAEL P | 2874 | §102 | Non-Final OA | — | Pending | Sep 30, 2024 |
| 18808992 | WRAP-AROUND SOURCE/DRAIN METHOD OF MAKING CONTACTS FOR BACKSIDE METALS | Intel Corporation | DINKE, BITEW A | §103Other | Non-Final OA | — | Pending | Aug 19, 2024 | |
| 18807193 | TECHNIQUES AND CONFIGURATIONS TO REDUCE TRANSISTOR GATE SHORT DEFECTS | Intel Corporation | VALENZUELA, PATRICIA D | Other | Non-Final OA | — | Pending | Aug 16, 2024 | |
| 18800827 | CONFINED EPITAXIAL REGIONS FOR SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING CONFINED EPITAXIAL REGIONS | Intel Corporation | GREEN, TELLY D | §112Other | Non-Final OA | — | Pending | Aug 12, 2024 | |
| 18798574 | HYDROPHOBIC FEATURE TO CONTROL ADHESIVE FLOW | Intel Corporation | BEDTELYON, JOHN M | 2874 | §102 | Non-Final OA | — | Pending | Aug 08, 2024 |
| 18787886 | OPTICAL COHERENT RECEIVER ON A CHIP | Intel Corporation | LAMBERT, DAVID W | 2634 | §103 | Non-Final OA | — | Pending | Jul 29, 2024 |
| 18774351 | BACKSIDE CONTACTS FOR SEMICONDUCTOR DEVICES | Intel Corporation | LEE, CHEUNG | 2812 | DP | Non-Final OA | — | Pending | Jul 16, 2024 |
| 18767458 | FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING ADJACENT ISLAND STRUCTURES | Intel Corporation | HARRISTON, WILLIAM A | 2899 | §102Other | Non-Final OA | — | Pending | Jul 09, 2024 |
| 18755987 | LAYOUT DESIGN SPECIFICATIONS AND METHODOLOGY FOR GENERATING SEMICONDUCTOR CHIP METAL INTERCONNECT LAYOUT FABRICS | Intel Corporation | PETERSON, ERIK T | 2898 | §102§103 | Non-Final OA | — | Pending | Jun 27, 2024 |
| 18757013 | CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATION ON BOTH SIDES | Intel Corporation | NIX, NORA TAYLOR | 2891 | §102§103§112 | Non-Final OA | — | Pending | Jun 27, 2024 |
| 18755189 | SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH IMPROVED CAP | Intel Corporation | NGUYEN, SOPHIA T | 2893 | §103 | Non-Final OA | — | Pending | Jun 26, 2024 |
| 18734746 | CAPACITOR DIE EMBEDDED IN PACKAGE SUBSTRATE FOR PROVIDING CAPACITANCE TO SURFACE MOUNTED DIE | Intel Corporation | BOWEN, ADAM S | 2897 | Other | Non-Final OA | — | Pending | Jun 05, 2024 |
| 18654739 | SAWMILL CARRIAGE, SAWMILL CARRIAGE KIT, AND METHOD OF USING SAME | Norwood Industries Inc. | LEE, LAURA MICHELLE | 3724 | §102§103 | Final Rejection | 30d overdue | Pending | May 03, 2024 |
| 18653815 | GATE ALIGNED CONTACT AND METHOD TO FABRICATE SAME | Intel Corporation | HENRY, CALEB E | 2818 | §102§103 | Non-Final OA | — | Pending | May 02, 2024 |
| 18649530 | MODULAR PRESS | USNR, LLC | NGUYEN, JIMMY T | 3725 | §102§112Other | Non-Final OA | 83d | Pending | Apr 29, 2024 |
| 18636037 | AUTOMATIC FEEDING, GRINDING, AND SORTING OF WOODWORKING KNIVES | Simonds International LLC | GUMP, MICHAEL ANTHONY | 3723 | §101§103§112 | Non-Final OA | — | Pending | Apr 15, 2024 |
| 18438450 | INTEGRATED TOP SIDE POWER DELIVERY THERMAL TECHNOLOGY | Intel Corporation | VALENZUELA, PATRICIA D | 2812 | §103 | Final Rejection | 34d | Pending | Feb 10, 2024 |
| 18400772 | INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED EPITAXIAL SOURCE OR DRAIN STRUCTURE | Intel Corporation | MUNOZ, ANDRES F | 2818 | §102 | Final Rejection | — | Pending | Dec 29, 2023 |
| 18390952 | GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES FABRICATED USING ALTERNATE ETCH SELECTIVE MATERIAL | Intel Corporation | KOO, LAMONT B | 2813 | §103 | Final Rejection | 22d | AI Ready | Dec 20, 2023 |
| 18566483 | ARTIFICIAL INTELLIGENCE REGULATORY MECHANISMS | Intel Corporation | BHAT, VIBHA NARAYAN | 2142 | §101§103§112 | Non-Final OA | — | Pending | Dec 01, 2023 |
| 18516595 | SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITHOUT FIN END GAP | Intel Corporation | KOO, LAMONT B | 2813 | §103 | Final Rejection | 40d | AI Ready | Nov 21, 2023 |
| 18381887 | GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING BOTTOM-UP OXIDATION APPROACH | Intel Corporation | PATEL, REEMA | 2812 | §112 | Non-Final OA | — | Pending | Oct 19, 2023 |
| 18375084 | INTEGRATED CIRCUIT STRUCTURE WITH DEEP VIA BAR WIDTH TUNING | Intel Corporation | VU, VU A | 2897 | — | Non-Final OA | — | Pending | Sep 29, 2023 |
| 18374596 | MICROELECTRONIC ASSEMBLIES | Intel Corporation | KARIMY, TIMOR | 2818 | §103§112 | Non-Final OA | — | Pending | Sep 28, 2023 |
| 18467659 | COMPLEX-ZERO EQUALIZER CIRCUIT | Intel Corporation | CORRIELUS, JEAN B | 2633 | — | Non-Final OA | — | Pending | Sep 14, 2023 |
| 18244689 | PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES | Intel Corporation | STARK, JARRETT J | 2898 | §103 | Final Rejection | — | AI Ready | Sep 11, 2023 |
| 18462220 | BRIDGE PRINTED CIRCUIT BOARD EMBEDDED WITHIN ANOTHER PRINTED CIRCUIT BOARD | Intel Corporation | SAWYER, STEVEN T | 2847 | — | Non-Final OA | — | Pending | Sep 06, 2023 |
| 18242322 | PACKAGE WITH EMBEDDED CAPACITORS | Intel Corporation | TRAN, TRANG Q | 2811 | §112 | Non-Final OA | 55d | AI Ready | Sep 05, 2023 |
| 18240106 | INTEGRATED CIRCUIT STRUCTURES HAVING UNIFORM GRID METAL GATE AND TRENCH CONTACT PLUG | Intel Corporation | KIM, TONG-HO | 2811 | §103Other | Non-Final OA | — | Pending | Aug 30, 2023 |
| 18236821 | TEST AND REPAIR ARCHITECTURE FOR INTER AND INTRA CLUSTER DEFECTS | Intel Corporation | LEIBOVICH, YAIR | 2114 | §112 | Non-Final OA | — | Pending | Aug 22, 2023 |
| 18223413 | INTEGRATED CIRCUIT STRUCTURES HAVING THROUGH-STACK THERMAL SINK FOR DUAL-SIDED DEVICES | Intel Corporation | MATTABONI, TIMOTHY JAMES | 2897 | §103 | Non-Final OA | — | Pending | Jul 18, 2023 |
| 18219018 | INTERLINKED GROUND WELLS WITH SPECIALIZED PATTERNS FOR LIQUID METAL INTERPOSER | Intel Corporation | TIVARUS, CRISTIAN ALEXANDRU | 2899 | §102§103§112 | Non-Final OA | — | Pending | Jul 06, 2023 |
| 18216914 | CONDUCTIVE LINES HAVING CONDUCTIVE METAL LINER FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION | Intel Corporation | STUESSY, NOLAN GABRIEL | 2812 | §102 | Non-Final OA | — | Pending | Jun 30, 2023 |
| 18216909 | INTEGRATED CIRCUIT STRUCTURES HAVING ALTERNATIVE CARRIERS FOR DUAL-SIDED DEVICES | Intel Corporation | STARK, JARRETT J | §102§103 | Non-Final OA | — | Pending | Jun 30, 2023 | |
| 18216315 | STACKED CHIPS WITH EDGE MOUNTED ANTENNAS FOR SMALL PITCH PHASED ARRAYS | Intel Corporation | MCCOY, THOMAS WILSON | 2814 | §102§103§112 | Non-Final OA | — | Pending | Jun 29, 2023 |
| 18216325 | INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE SOURCE OR DRAIN CONTACT DIFFERENTIATED ACCESS | Intel Corporation | KNUDSON, BRAD ALLAN | 2817 | §102§103 | Non-Final OA | — | Pending | Jun 29, 2023 |
| 18215748 | INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED END CAP | Intel Corporation | BOEGEL, CHEVY JACOB | 2812 | §102§103 | Non-Final OA | — | Pending | Jun 28, 2023 |
| 18343255 | REGIONAL BRIGHTNESS CONTROL SCHEME FOR DISPLAY POWER SAVING | Intel Corporation | PEARSON, AMANDA HYEONWOO | 2666 | §103 | Non-Final OA | — | Pending | Jun 28, 2023 |
| 18214271 | CONDUCTIVE LINES HAVING MOLYBDENUM LINER AND TUNGSTEN FILL FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION | Intel Corporation | VU, DAVID | 2818 | §102§103 | Non-Final OA | — | Pending | Jun 26, 2023 |
| 18214262 | INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE SOURCE OR DRAIN CONTACT SELECTIVITY | Intel Corporation | FOX, BRANDON C | 2818 | §103Other | Non-Final OA | — | Pending | Jun 26, 2023 |
| 18214244 | INTEGRATED CAPACITOR | Intel Corporation | LIU, MIKKA H | 2817 | §102§103§112 | Non-Final OA | — | Pending | Jun 26, 2023 |
| 18214252 | INTEGRATED CAPACITOR | Intel Corporation | GHEYAS, SYED I | 2893 | §102§103 | Non-Final OA | — | Pending | Jun 26, 2023 |
| 18340794 | ENHANCING TEMPERATURE STABILITY IN REFERENCE CLOCK APPLICATIONS USING RESONATOR ARRAYS | Intel Corporation | SHIN, JEFFREY M | 2836 | §102§103 | Non-Final OA | — | Pending | Jun 23, 2023 |
| 18212824 | INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE PLUG LAST APPROACH | Intel Corporation | LIU, MIKKA H | 2817 | §102§103§112 | Non-Final OA | — | Pending | Jun 22, 2023 |
| 18212382 | INTEGRATED CIRCUIT STRUCTURE WITH DEEP VIA BAR ISOLATION | Intel Corporation | LIU, XIAOMING | 2812 | §103 | Non-Final OA | — | Pending | Jun 21, 2023 |
IP Author helps law firms respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.
Start Free Trial90.0% of resolved applications prosecuted by Schwabe, Williamson & Wyatt, P.C. were allowed, across 16,676 applications in USPTO records.
3.46 office actions per allowed application on average.
174 pending office actions as of October 2026, for 4 clients, before 140 examiners in 41 art units.
