Listed by the USPTO as MEHTA, RATISHA
Tech Center 2800 • Art Units: 2800 2817 2895 2896 2899
This examiner grants 90% of resolved cases
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18711005 | DISPLAY DEVICE | Non-Final OA | LG ELECTRONICS INC. |
| 18738153 | SEMICONDUCTOR PACKAGE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18521994 | INTERCONNECT STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SAME | Final Rejection | Samsung Electronics Co., Ltd. |
| 18518230 | DISPLAY DEVICE | Non-Final OA | LG Display Co., Ltd. |
| 18617991 | DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME | Non-Final OA | Samsung Display Co., LTD. |
| 18494387 | DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME | Final Rejection | Samsung Display Co., LTD. |
| 18492927 | THIN FILM TRANSISTOR, MANUFACTURING METHOD OF THE SAME, AND DISPLAY DEVICE HAVING THE SAME | Non-Final OA | Samsung Display Co., LTD. |
| 18213900 | DISPLAY DEVICE | Non-Final OA | Samsung Display Co., Ltd. |
| 18189066 | DISPLAY DEVICE | Final Rejection | Samsung Display Co., LTD. |
| 18148717 | METHODS AND APPARATUS TO DETECT DEFECTS DURING SEMICONDUCTOR CHIP FABRICATION AND/OR TO DEBUG SEMICONDUCTOR CHIPS AFTER FABRICATION | Non-Final OA | Intel Corporation |
| 18895349 | LIGHT EMITTING DEVICE | Non-Final OA | InnoLuX Corporation |
| 18361834 | Laterally-Diffused Metal-Oxide Semiconductor Devices with Reduced Gate Charge and Time-Dependent Dielectric Breakdown | Non-Final OA | Avago Technologies International Sales Pte. Limited |
| 18424704 | MICROELECTRONIC DEVICES INCLUDING CONTACT STRUCTURES, AND RELATED MEMORY DEVICES, AND ELECTRONIC SYSTEMS | Non-Final OA | Micron Technology, Inc. |
| 18703792 | Power Module and Method for Assembling a Power Module | Non-Final OA | ZF Friedrichshafen AG |
| 18478087 | PACKAGES WITH STEPPED CONDUCTIVE TERMINALS | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 18535332 | STACKED FET WITH SHIFTED CHANNEL STRUCTURE | Non-Final OA | International Business Machines Corporation |
| 18726711 | WAFER HAVING MICRO-LED STRUCTURE, METHOD FOR MANUFACTURING WAFER HAVING MICRO-LED STRUCTURE, AND METHOD FOR MANUFACTURING BONDED SEMICONDUCTOR WAFER HAVING MICRO-LED STRUCTURE | Non-Final OA | SHIN-ETSU HANDOTAI CO., LTD. |
| 18523255 | LOW MELT POINT METAL BASED THERMAL INTERFACE MATERIAL | Non-Final OA | Honeywell International Inc. |
| 18408932 | SEMICONDUCTOR DEVICE AND METHOD | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18631290 | SEMICONDUCTOR DEVICE | Non-Final OA | MIRISE Technologies Corporation |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy89.7% of resolved applications examined by Ratisha Mehta were allowed (648 resolved cases), compared with 69.7% across Art Unit 2800 over the last five years.
This examiner's interview lift is +5.6 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Ratisha Mehta took 735 days on average from filing to allowance.
Ratisha Mehta examines applications in Art Unit 2800 in Tech Center 2800 (Semiconductors, Circuits & Optics).
