Listed by the USPTO as PARTHASARATHY, ROHIT
Tech Center 4100 • Art Units: 2899 4100
This examiner grants 90% of resolved cases
Examiner Rohit Parthasarathy is assigned to Tech Center 4100 and Art Unit 2899. The profile shows 51 resolved cases with an allowance rate of 90.2 percent. This allowance rate is higher than the interview lift of 13.2 percent. The median days to allowance for cases that reach a grant is 1168.
The 90.2 percent allowance rate indicates the proportion of the 51 resolved cases that result in a patent grant. An interview lift of 13.2 percent suggests that direct engagement with the examiner is a factor in the prosecution process. Practitioners should evaluate the 1168 median days to allowance when determining the expected timeline for their applications.
Top companies appearing in this record include International Business Machines Corporation, Taiwan Semiconductor Manufacturing Company, Ltd., and Samsung Electronics Co., Ltd. Representation is provided by firms such as Li & Cai Intellectual Property(USA) office, RYAN, MASON & LEWIS, LLP, and DORITY & MANNING, P.A. These firms navigate the 90.2 percent allowance rate and the 1168 median days to allowance.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18605431 | SEMICONDUCTOR PACKAGE | Final Rejection | SAMSUNG ELECTRONICS CO., LTD. |
| 18686234 | SEMICONDUCTOR HETEROSTRUCTURES WITH SCANDIUM III-NITRIDE LAYER | Final Rejection | The Regents of the University of Michigan |
| 18800131 | DISPLAY DEVICE | Non-Final OA | Samsung Display Co., Ltd. |
| 18229959 | Capacitor Carrier Ring And Stiffener For Integrated Circuit Package Assembly | Final Rejection | Google LLC |
| 18604150 | WRAP AROUND METAL CONTACT | Final Rejection | International Business Machines Corporation |
| 18586753 | STACKED STRUCTURES WITH SPLIT DEVICE LAYERS | Non-Final OA | International Business Machines Corporation |
| 19283746 | INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18510523 | SEAL RING STRUCTURE AND METHOD OF FORMING SAME | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy90.2% of resolved applications examined by Rohit Parthasarathy were allowed (51 resolved cases), compared with 81.9% across Art Unit 2899 over the last five years.
This examiner's interview lift is +13.2 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Rohit Parthasarathy took 1,168 days on average from filing to allowance.
Rohit Parthasarathy examines applications in Art Unit 2899 in Tech Center 4100.
