Listed by the USPTO as SREEVATSA, SREEYA
Tech Center 3700 • Art Units: 2815 2834 2835 2838 2839 3761
This examiner grants 86% of resolved cases
SREEVATSA, SREEYA is an examiner in USPTO Technology Center 3700, Art Unit 2815. Across 306 resolved cases, the allowance rate is 85.9%, and the median time to allowance is 914 days. Interview lift is 4.4%, so the profile’s outcome pattern is driven primarily by the high allowance rate rather than by a large interview effect.
The leading companies are Lam Research Corporation, Seiko Epson Corporation, and ABB Schweiz AG. The leading firms are BUCHANAN, INGERSOLL & ROONEY PC, Chen Yoshimura LLP, and CHIP LAW GROUP. The resolved-case volume provides a substantial basis for planning, while the timing measure indicates that favorable outcomes may still require a considerable prosecution interval.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18989732 | Circuit Device | Non-Final OA | SEIKO EPSON CORPORATION |
| 18554700 | INTRINSICALLY SAFE CIRCUIT FOR LOAD | Non-Final OA | ABB Schweiz AG |
| 18881021 | FLEXIBLE CIRCUIT BOARD, DISPLAY MODULE AND DISPLAY DEVICE | Non-Final OA | BOE TECHNOLOGY GROUP CO., LTD. |
| 18982866 | PHOTOVOLTAIC INVERTER AND PROTECTION METHOD | Non-Final OA | Huawei Digital Power Technologies Co., Ltd. |
| 18216447 | HIGH-FREQUENCY INTERFACE CIRCUIT PROTECTION FROM ELECTROSTATIC DISCHARGE EVENTS | Non-Final OA | Intel Corporation |
| 18871372 | CHUCKING SYSTEM WITH SILANE COUPLING AGENT | Final Rejection | Lam Research Corporation |
| 18840339 | APPARATUS AND METHODS FOR REDUCING WAFER BACKSIDE DAMAGE | Non-Final OA | Lam Research Corporation |
| 18993625 | ELECTRIC POWER CONVERSION SYSTEM | Non-Final OA | Mitsubishi Electric Corporation |
| 18855458 | CIRCUIT BREAKER AND INTERRUPTION METHOD | Final Rejection | NIPPON TELEGRAPH AND TELEPHONE CORPORATION |
| 18730510 | Electronic Circuit Arrangement for Current Limitation | Final Rejection | Siemens Aktiengesellschaft |
| 18962165 | MODULAR ADAPTIVE SQUIB FIRE SOURCE | Non-Final OA | BAE Systems Information and Electronic Systems Integration Inc. |
| 18333879 | SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE | Non-Final OA | ROHM Co., LTD. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy85.9% of resolved applications examined by Sreeya Sreevatsa were allowed (306 resolved cases), compared with 61.3% across Art Unit 2815 over the last five years.
This examiner's interview lift is +4.4 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Sreeya Sreevatsa took 914 days on average from filing to allowance.
Sreeya Sreevatsa examines applications in Art Unit 2815 in Tech Center 3700 (Medical Devices & Mechanical Engineering).