Listed by the USPTO as TRAPANESE, WILLIAM C
Tech Center 2800 • Art Units: 2171 2812 2826
This examiner grants 78% of resolved cases
TRAPANESE, WILLIAM C is assigned to tech center 2800 and art unit 2171. The record includes 668 resolved cases, an allowance rate of 77.5%, and a median of 1157 days to allowance. The volume supports using the profile as a meaningful prosecution reference, while the timing figure should inform expectations for portfolio management.
The interview lift is 20.6%, indicating a potential benefit from interviews when they are directed to concrete examination issues. The listed companies are Samsung Electronics Co., Ltd., SanDisk Technologies Inc., and Samsung Display Co., Ltd. The listed firms are DORITY & MANNING, P.A., FENWICK & WEST LLP, and HARNESS DICKEY (DETROIT). These organizations identify representative participants in the available record.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18653157 | INTEGRATED CIRCUIT MEMORY DEVICES HAVING HIGHLY INTEGRATED MEMORY CELLS THEREIN WITH ENHANCED LANDING PAD STRUCTURES | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18650189 | SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18426365 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME | Non-Final OA | Samsung Display Co., Ltd. |
| 18544605 | QUANTUM DEVICE | Non-Final OA | NEC Corporation |
| 18750011 | ELECTRONIC DEVICE COMPRISING A LAYER OF 2D MATERIAL | Non-Final OA | Commissariat à l'Énergie Atomique et aux Énergies Alternatives |
| 18665944 | SEMICONDUCTOR DIE HAVING A METALLIZATION LAYER INCLUDING A METAL LAYER AND A RESISTIVE METAL IN THE METAL LAYER TO DECREASE PARASITIC CAPACITANCE | Non-Final OA | QUALCOMM Incorporated |
| 18692926 | METHOD FOR PRODUCING HETEROEPITAXIAL WAFER | Non-Final OA | SHIN-ETSU HANDOTAI CO., LTD. |
| 18426069 | THREE-DIMENSIONAL MEMORY DEVICE WITH COMPACT STAIRCASES AND METHODS OF FORMING THE SAME | Non-Final OA | SANDISK TECHNOLOGIES LLC |
| 18426040 | THREE-DIMENSIONAL MEMORY DEVICE WITH COMPACT STAIRCASES AND METHODS OF FORMING THE SAME | Non-Final OA | SANDISK TECHNOLOGIES LLC |
| 18675186 | LAYOUT OF STATIC RANDOM ACCESS MEMORY | Non-Final OA | UNITED MICROELECTRONICS CORP. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy77.5% of resolved applications examined by William C Trapanese were allowed (668 resolved cases), compared with 56.1% across Art Unit 2171 over the last five years.
This examiner's interview lift is +20.6 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by William C Trapanese took 1,157 days on average from filing to allowance.
William C Trapanese examines applications in Art Unit 2171 in Tech Center 2800 (Semiconductors, Circuits & Optics).