Prosecution Insights
Last updated: October 26, 2026

Andrew John Zabel, USPTO Patent Examiner

Listed by the USPTO as ZABEL, ANDREW JOHN

Tech Center 2800 • Art Units: 2818

This examiner grants 82% of resolved cases

Analysis

ZABEL, ANDREW JOHN is a USPTO patent examiner in tech center 2800 and art unit 2818. The profile reports 40 resolved cases, an 82.5% allowance rate, and a median of 1238 days to allowance. The limited resolved-case volume makes the record narrower than a large examination history, while the allowance figure shows that most recorded cases reached allowance.

The interview lift is 25.9%, indicating a positive association between interviews and allowance outcomes. Taiwan Semiconductor Manufacturing Company, Ltd., Samsung Electronics Co., Ltd., and Kabushiki Kaisha Toshiba are the listed companies. JCIPRNET, Harrity & Harrity , LLP, and OLIFF PLC are the listed firms. Practitioners can use the profile as matter-specific context, while recognizing that the available sample is limited.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

82.5%
Allow Rate
+14.5% vs TC avg
89
Total Applications
+25.9%
Interview Lift
1238
Avg Prosecution Days
Based on 40 resolved cases, 2023–2026

Rejection Statute Breakdown

0%
§101 Eligibility
28.2%
§102 Novelty
65.4%
§103 Obviousness
6.4%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18594300 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME Final Rejection Samsung Electronics Co., Ltd.
18427977 SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME Final Rejection Samsung Electronics Co., Ltd.
18197847 DISPLAY MODULE Final Rejection SAMSUNG ELECTRONICS CO., LTD.
18131548 SEMICONDUCTOR DEVICE Final Rejection SAMSUNG ELECTRONICS CO., LTD.
18185237 Display with Side-Wrapped Conductive Traces Final Rejection Apple Inc.
18767875 Display Device Non-Final OA LG Display Co., Ltd.
18594298 DISPLAY DEVICE Final Rejection Samsung Display Co., LTD.
18682458 METAL OXIDE THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING SAME, AND DISPLAY PANEL Non-Final OA BOE Technology Group Co., Ltd.
18712336 MAGNETIZATION ROTATION ELEMENT, MAGNETORESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORY Non-Final OA TDK Corporation
18404657 LEGGED SUPPORT STRUCTURE TO MITIGATE STACKED DIE OVERHANG DEFLECTION Final Rejection Micron Technology, Inc.
18681773 SEMICONDUCTOR-SUPERCONDUCTOR HYBRID DEVICE HAVING SIDE JUNCTIONS Non-Final OA Microsoft Technology Licensing LLC
18044386 LASER PROCESSING APPARATUS AND LASER PROCESSING METHOD Non-Final OA Tokyo Electron Limited
18434903 BACKSIDE TO FRONTSIDE CONNECTION BETWEEN DIFFERENT METAL TRACKS Non-Final OA INTERNATIONAL BUSINESS MACHINES CORPORATION
18683042 TEMPORARILY BONDED WAFER AND METHOD FOR MANUFACTURING THE WAFER Non-Final OA SHIN-ETSU HANDOTAI CO., LTD.
18433936 BARRIER AND LINER TREATMENT USING DUAL RADIO FREQUENCY CAPACITIVE COUPLE PLASMA FOR METAL INTERCONNECTS Non-Final OA Applied Materials, Inc.
18594210 RESISTOR Non-Final OA STMicroelectronics International N.V.
18586596 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING A SEMICONDUCTOR DEVICE Non-Final OA TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
18411620 Static Random-Access Memory Device with Enhanced Isolation Structure and Increased Packing Density Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18303551 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME Non-Final OA TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
17887490 TRANSISTOR, INTEGRATED CIRCUIT, AND MANUFACTURING METHOD OF TRANSISTOR Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18609870 SEMICONDUCTOR STRUCTURE WITH STRESS RELIEF LAYER AND THE METHODS FORMING THE SAME Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18405526 FIELD EFFECT TRANSISTOR WITH ISOLATED SOURCE/DRAINS AND METHOD Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18059242 DISPLAY PANEL AND METHOD OF MANUFACTURING SAME, AND DISPLAY DEVICE Final Rejection TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

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Frequently Asked Questions

What is examiner Andrew John Zabel's allowance rate?

82.5% of resolved applications examined by Andrew John Zabel were allowed (40 resolved cases), compared with 85.2% across Art Unit 2818 over the last five years.

Does an interview help with examiner Andrew John Zabel?

This examiner's interview lift is +25.9 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Andrew John Zabel take to allow a patent?

Applications allowed by Andrew John Zabel took 1,238 days on average from filing to allowance.

Which art unit does examiner Andrew John Zabel work in?

Andrew John Zabel examines applications in Art Unit 2818 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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