Technology area: Semiconductors, Circuits & Optics
3 pending office actions • 3 art units • 3 examiners • 0 of 3 (0%) have an AI response strategy ready • 11 patents granted in the last 365 days
Jcet Group Co. Ltd. has 3 pending office actions in Semiconductors, Circuits & Optics. Each matter is associated with a distinct examiner and a distinct art unit, producing 3 distinct examiners and 3 distinct art units. The pending work is therefore fully separated by the available assignment data.
WINTERS, SEAN AYERS is the busiest examiner, with 1 pending matter. Counsel should prepare individualized responses and compare the cases only to identify useful consistency in semiconductor terminology or claim drafting. Separate review of the cited art and the relevant technical disclosure will be more reliable than assuming a shared examination approach.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 1 (33%) |
| Multi-statute (no §101) | 2 (67%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| WINTERS, SEAN AYERS | 1 | 88.7% | +17.9% |
| TRAN, TIEN | 1 | 89.7% | +14.3% |
| DANG, PHUC T | 1 | 95.5% | +1.4% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18735134 | PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | DANG, PHUC T | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18795130 | PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | WINTERS, SEAN AYERS | — |
| 18792364 | PACKAGE STRUCTURE AND METHOD FOR FORMING SAME | TRAN, TIEN | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18795130 | PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | WINTERS, SEAN AYERS | — |
| 18792364 | PACKAGE STRUCTURE AND METHOD FOR FORMING SAME | TRAN, TIEN | — |
| Art Unit | Apps |
|---|---|
| 2892 | 1 |
| 2812 | 1 |
| 2897 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18795130 | PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | WINTERS, SEAN AYERS | 2892 | §102§103 | Non-Final OA | — | Pending | Aug 05, 2024 |
| 18792364 | PACKAGE STRUCTURE AND METHOD FOR FORMING SAME | TRAN, TIEN | 2812 | §102§103 | Non-Final OA | — | Pending | Aug 01, 2024 |
| 18735134 | PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | DANG, PHUC T | 2897 | §103 | Non-Final OA | — | Pending | Jun 05, 2024 |
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Start Free TrialJcet Group Co. Ltd. has 3 pending office actions as of October 2026, spread across 3 art units and 3 examiners.
Sean Ayers Winters has the most, with 1 of Jcet Group Co. Ltd.'s pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
