Prosecution Insights
Last updated: October 27, 2026

Tien Tran, USPTO Patent Examiner

Listed by the USPTO as TRAN, TIEN

Tech Center 2800 • Art Units: 2812

This examiner grants 90% of resolved cases

Analysis

TRAN, TIEN is assigned to Tech Center 2800 and Art Unit 2812. The profile contains 29 resolved cases, an 89.7% allowance rate, and a 14.3% interview lift. The median time to allowance is 1155 days. The limited record warrants caution in applying the figures broadly, but it reports a high allowance outcome and a measurable interview effect that may guide case-specific planning.

Samsung Electronics Co., Ltd., Samsung Display Co., Ltd., and Qualcomm Incorporated are the leading companies. The listed firms are HARNESS, DICKEY & PIERCE, P.L.C., NORTH AMERICA INTELLECTUAL PROPERTY CORPORATION, and Arch & Lake LLP. Counsel may emphasize technically precise written responses and use interviews where they can efficiently clarify claim scope.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

89.7%
Allow Rate
+21.7% vs TC avg
59
Total Applications
+14.3%
Interview Lift
1155
Avg Prosecution Days
Based on 29 resolved cases, 2023–2026

Rejection Statute Breakdown

2.7%
§101 Eligibility
24.0%
§102 Novelty
60.7%
§103 Obviousness
10.0%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18671541 SEMICONDUCTOR PACKAGES HAVING TRENCH STRUCTURES Non-Final OA Samsung Electronics Co., Ltd.
18435016 SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME Final Rejection Samsung Electronics Co., Ltd.
18799684 DISPLAY DEVICE Non-Final OA LG Display Co., Ltd.
18668614 METHOD OF TRANSFERRING LIGHT EMITTING ELEMENT USING STRETCHING DEVICE Non-Final OA Samsung Display Co., LTD.
17987640 MASK FRAME ASSEMBLY AND METHOD OF MANUFACTURING DISPLAY APPARATUS BY USING THE SAME Final Rejection Samsung Display Co., Ltd.
18824706 GATE-ALL-AROUND FIELD EFFECT TRANSISTOR STRUCTURES Non-Final OA QUALCOMM Incorporated
18469496 GATE-ALL-AROUND FIELD EFFECT TRANSISTOR STRUCTURES Non-Final OA QUALCOMM Incorporated
17561733 3D ARRAYED GLASS-BASED MMWAVE AND THZ STRUCTURES Non-Final OA Intel Corporation
18889802 ELECTRONIC DEVICE Non-Final OA InnoLux Corporation
18295156 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Non-Final OA SK hynix Inc.
18538105 MEMS SENSOR AND METHOD OF MANUFACTURING MEMS SENSOR Final Rejection ROHM CO., LTD.
18411226 STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH GATE STACK Final Rejection Taiwan Semiconductor Manufacturing Company, Ltd.
18408944 TRANSISTOR STRUCTURE WITH HIGHER JUNCTION BREAKDOWN VOLTAGE Non-Final OA Taiwan Semiconductor Manufacturing Company, LTD.
18395789 MOTHER SUBSTRATE FOR DISPLAY DEVICE, DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE Final Rejection Magnolia White Corporation
18797441 CERAMIC SUBSTRATE, LIGHT SOURCE DEVICE, METHOD OF MANUFACTURING CERAMIC SUBSTRATE, AND METHOD OF MANUFACTURING LIGHT SOURCE DEVICE Non-Final OA NICHIA CORPORATION
18821978 CELL ARRANGEMENT FOR SEMICONDUCTOR DEVICE LAYOUT Non-Final OA Arm Limited
18075383 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Final Rejection UNITED MICROELECTRONICS CORP.

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Frequently Asked Questions

What is examiner Tien Tran's allowance rate?

89.7% of resolved applications examined by Tien Tran were allowed (29 resolved cases), compared with 82.1% across Art Unit 2812 over the last five years.

Does an interview help with examiner Tien Tran?

This examiner's interview lift is +14.3 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Tien Tran take to allow a patent?

Applications allowed by Tien Tran took 1,155 days on average from filing to allowance.

Which art unit does examiner Tien Tran work in?

Tien Tran examines applications in Art Unit 2812 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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