Technology area: Semiconductors, Circuits & Optics
3 pending office actions • 3 art units • 3 examiners • 0 of 3 (0%) have an AI response strategy ready • 13 patents granted in the last 365 days
Sj Semiconductor(Jiangyin) Corporation has 4 pending office actions in Semiconductors, Circuits & Optics. The matters are distributed among 4 distinct examiners and 4 distinct art units, indicating separate examination channels throughout the identified portfolio. The matching figures show that each action is associated with its own examiner and art unit.
CHEN, YU is the busiest examiner, with 1 pending matter. The action load is therefore distributed across the identified examiners rather than concentrated with this examiner. Counsel should use matter-specific analysis for each assignment and coordinate only those semiconductor, circuit, or optics positions that genuinely recur across the applications.
Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 3 (100%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| ANDERSON, WILLIAM H | 1 | 84.9% | +18.4% |
| CAMPBELL, SHAUN M | 1 | 72.9% | +8.6% |
| TRAN, TRANG Q | 1 | 81.4% | +7.2% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18139748 | THREE-DIMENSIONAL FAN-OUT MEMORY POP STRUCTURE AND PACKAGING METHOD THEREOF | ANDERSON, WILLIAM H | 59d overdue |
| 18132602 | HIGH-DENSITY-INTERCONNECTION PACKAGING STRUCTURE AND METHOD FOR PREPARING SAME | TRAN, TRANG Q | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18139748 | THREE-DIMENSIONAL FAN-OUT MEMORY POP STRUCTURE AND PACKAGING METHOD THEREOF | ANDERSON, WILLIAM H | 59d overdue |
| Art Unit | Apps |
|---|---|
| 2817 | 1 |
| 2893 | 1 |
| 2811 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18139748 | THREE-DIMENSIONAL FAN-OUT MEMORY POP STRUCTURE AND PACKAGING METHOD THEREOF | ANDERSON, WILLIAM H | 2817 | §103 | Non-Final OA | 59d overdue | Pending | Apr 26, 2023 |
| 18137994 | ELECTRONIC PACKAGING STRUCTURE | CAMPBELL, SHAUN M | 2893 | §103 | Non-Final OA | 168d overdue | Pending | Apr 21, 2023 |
| 18132602 | HIGH-DENSITY-INTERCONNECTION PACKAGING STRUCTURE AND METHOD FOR PREPARING SAME | TRAN, TRANG Q | 2811 | §103 | Non-Final OA | — | Pending | Apr 10, 2023 |
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Start Free TrialSj Semiconductor(Jiangyin) Corporation has 3 pending office actions as of October 2026, spread across 3 art units and 3 examiners.
William H Anderson has the most, with 1 of Sj Semiconductor(Jiangyin) Corporation's pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
