Listed by the USPTO as TRAN, TRANG Q
Tech Center 2800 • Art Units: 2800 2811
This examiner grants 81% of resolved cases
TRAN, TRANG Q works in Tech Center 2800 and Art Unit 2800. The profile includes 741 resolved cases, an 81.4% allowance rate, and a 7.2% interview lift. The median time to allowance is 984 days. The substantial record and favorable allowance rate support a positive prosecution assessment, while the lower interview figure suggests that written claim treatment may be the more consistent planning tool.
Taiwan Semiconductor Manufacturing Company, Ltd., Samsung Electronics Co., Ltd., and Intel Corporation are the leading companies. The listed firms are Eschweiler & Potashnik, LLC (TSMC), FISH & RICHARDSON P.C. (TC), and Muir Patent Law, PLLC. Counsel may focus on precise semiconductor claim language, clear prior-art distinctions, and efficient written responses.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18740045 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18437473 | STACKED INTEGRATED CIRCUIT DEVICE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18497672 | SEMICONDUCTOR PACKAGE | Final Rejection | SAMSUNG ELECTRONICS CO., LTD. |
| 18222567 | SEMICONDUCTOR PACKAGE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18208979 | SEMICONDUCTOR MEMORY DEVICE, METHOD FOR MANUFACTURING THE SAME AND ELECTRONIC SYSTEM INCLUDING THE SAME | Final Rejection | SAMSUNG ELECTRONICS CO., LTD. |
| 18021197 | ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY APPARATUS | Final Rejection | BOE TECHNOLOGY GROUP CO., LTD. |
| 18242322 | PACKAGE WITH EMBEDDED CAPACITORS | Non-Final OA | Intel Corporation |
| 17825340 | INTEGRATED CIRCUIT ASSEMBLIES HAVING INTERCONNECTION BRIDGES SPANNING INTEGRATED CIRCUIT DEVICES THEREIN | Final Rejection | Intel Corporation |
| 17481234 | MULTIPLE DIES COUPLED WITH A GLASS CORE SUBSTRATE | Non-Final OA | Intel Corporation |
| 18415679 | ELECTRONIC DEVICE | Non-Final OA | InnoLux Corporation |
| 18020758 | SEMICONDUCTOR DEVICE | Non-Final OA | Semiconductor Energy Laboratory Co., Ltd. |
| 17899909 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR STORAGE DEVICE | Non-Final OA | Kioxia Corporation |
| 18429228 | LASER ANNEAL FORMED NANOSHEET LDMOS TRANSISTOR | Non-Final OA | Texas Instruments Incorporated |
| 18431001 | OLED STRUCTURE AND PROCESS BASED ON PIXEL PASSIVATION BY REMOVING OLED STACK OVER HEAT ABSORBENT STRUCTURES | Non-Final OA | Applied Materials, Inc. |
| 18603629 | IMAGE SENSORS AND METHOD OF MANUFACTURING THE SAME | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18498031 | DUMMY DIES AND METHOD OF FORMING THE SAME | Final Rejection | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18224065 | SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING THE SAME | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18336435 | PACKAGE STRUCTURE WITH DUMMY DIE | Final Rejection | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 17570710 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FORMATION | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18788697 | SEMICONDUCTOR PACKAGE AND METHOD OF FORMING SAME | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18786482 | PACKAGE AND METHOD OF FABRICATING THE SAME | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18428315 | SEMICONDUCTOR DEVICE AND METHOD | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18334695 | Integrated Circuit Package and Methods of Forming the Same | Final Rejection | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18151856 | Die Structures and Methods of Forming the Same | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy81.4% of resolved applications examined by Trang Q Tran were allowed (741 resolved cases), compared with 69.7% across Art Unit 2800 over the last five years.
This examiner's interview lift is +7.2 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Trang Q Tran took 984 days on average from filing to allowance.
Trang Q Tran examines applications in Art Unit 2800 in Tech Center 2800 (Semiconductors, Circuits & Optics).
