Listed by the USPTO as ABDELAZIEZ, YASSER A
Tech Center 2800 • Art Units: 2812 2898
This examiner grants 86% of resolved cases
ABDELAZIEZ, YASSER A examines cases in Tech Center 2800 and Art Unit 2812, with 842 resolved cases. The profile shows an 86.3% allowance rate and a median of 789 days to allowance. The 3.0% interview lift is positive but limited, suggesting that interview participation has not materially changed the overall allowance pattern in the recorded cases.
United Microelectronics Corp., Canon Inc., and LG Display Co., Ltd. are the leading companies represented. NORTH AMERICA INTELLECTUAL PROPERTY CORPORATION, Boston & Galway, and Harrity & Harrity, LLP are the leading firms shown. The substantial case record makes this profile useful for historical planning, particularly when setting expectations about allowance prospects and prosecution duration.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18479966 | DEPOSITION MASK, AND METHOD FOR PRODUCING ORGANIC LIGHT-EMITTING ELEMENT | Non-Final OA | CANON KABUSHIKI KAISHA |
| 18677625 | DISPLAY DEVICE | Non-Final OA | LG Display Co., Ltd. |
| 18668786 | ELECTRONIC DEVICE | Non-Final OA | InnoLux Corporation |
| 18039202 | METHOD OF FORMING A THIN FILM | Final Rejection | Microsoft Technology Licensing, LLC |
| 18045181 | FORMING SOURCE/DRAIN REGION IN STACKED FET STRUCTURE | Non-Final OA | INTERNATIONAL BUSINESS MACHINES CORPORATION |
| 18471777 | SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THEREOF | Non-Final OA | Infineon Technologies AG |
| 18660154 | PACKAGE AND MANUFACTURING METHOD THEREOF | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18888508 | SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME | Non-Final OA | NANYA TECHNOLOGY CORPORATION |
| 18752807 | RESISTIVE RANDOM ACCESS MEMORY DEVICE AND FABRICATION METHOD THEREOF | Non-Final OA | UNITED MICROELECTRONICS CORP. |
| 17953336 | SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD OF THE SAME | Final Rejection | UNITED MICROELECTRONICS CORP. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy86.3% of resolved applications examined by Yasser A Abdelaziez were allowed (842 resolved cases), compared with 82.1% across Art Unit 2812 over the last five years.
This examiner's interview lift is +3.0 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Yasser A Abdelaziez took 789 days on average from filing to allowance.
Yasser A Abdelaziez examines applications in Art Unit 2812 in Tech Center 2800 (Semiconductors, Circuits & Optics).
