Listed by the USPTO as AGGER, ELIZABETH ROSE
Tech Center 2800 • Art Units: 2824 2827 2893
This examiner grants 95% of resolved cases
| App # | Title | Status | Assignee |
|---|---|---|---|
| 19029179 | DEVICE INCLUDING BIDIRECTIONAL DATA TRANSCEIVER AND METHOD OF OPERATING THE SAME | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18789762 | INTERFACE CIRCUITS, NON-VOLATILE MEMORY DEVICES, AND MEMORY CONTROLLERS HAVING ENHANCED OUTPUT DRIVERS THEREIN | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18437394 | MULTI-BIT CELL AND MULTI-BIT CELL ARRAY INCLUDING THE SAME | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18485353 | MEMORY DEVICE AND MEMORY DEVICE OPERATING METHOD | Final Rejection | Samsung Electronics Co., Ltd. |
| 18835381 | Traffic Aware Adaptive Precharge Scheduler For Efficient Refresh Management In Dram Memory Controllers | Final Rejection | Google LLC |
| 18417631 | APPARATUS AND METHOD OF IMPLEMENTING A PROBABILISTIC BIT (P-BIT) CIRCUIT WITH ENHANCED TUNABILITY | Non-Final OA | KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS |
| 19029223 | METHODS FOR MITIGATING POWER LOSS EVENTS DURING OPERATION OF MEMORY DEVICES AND MEMORY DEVICES EMPLOYING THE SAME | Non-Final OA | Micron Technology, Inc. |
| 18804865 | DIRECT DECISION FEEDBACK EQUALIZATION SINGLE-ENDED RECEIVER | Final Rejection | Micron Technology, Inc. |
| 18795185 | INTEGRATED CIRCUIT DEVICE HAVING SWING DETECTOR AND SYSTEM INCLUDING INTEGRATED CIRCUIT DEVICES | Final Rejection | SK hynix Inc. |
| 18416890 | SEMICONDUCTOR DEVICE | Final Rejection | SK hynix Inc |
| 18510656 | DATA STORAGE DEVICE AND OPERATING METHOD THEREOF | Final Rejection | SK hynix Inc. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy95.2% of resolved applications examined by Elizabeth Rose Agger were allowed (42 resolved cases), compared with 86.6% across Art Unit 2824 over the last five years.
This examiner's interview lift is -0.9 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Elizabeth Rose Agger took 909 days on average from filing to allowance.
Elizabeth Rose Agger examines applications in Art Unit 2824 in Tech Center 2800 (Semiconductors, Circuits & Optics).
